Category Archives: Verification

Hierarchical Sequences in UVM

April 06, 2017, anysilicon

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Rising design complexity is leading to near exponential increase in verification efforts. The industry has embraced verification reuse by adopting UVM, deploying VIPs and plugging block level env components at sub system or SoC level. According to a verification study conducted by Wilson research in 2012 (commissioned by Mentor) the engineers spend ~60%

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ASIC Verification: Build or Simulate?

April 03, 2017, anysilicon

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Companies are using FPGAs for the variety of benefits they offer, including:
 

Rapid-prototyping
Running large sets of test data
Software development

 
The advantages of using FPGAs for verification include:
 

Smaller, less complex designs can be verified solely by building them in an FPGA
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Moving towards Context Aware Verification (CAV)

February 23, 2017, anysilicon

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The race between predictions vs. achievement of Moore’s law has had multi-fold impact on the semiconductor industry. Reuse has come to the rescue both from the design and verification viewpoint to help teams achieve added functionality on a given die size. This phenomenon lead to the proliferation of IP &

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Evolution of the Test Bench

April 11, 2016, anysilicon

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Nothing is permanent except change and need constantly guides innovation. Taking a holistic view with reference to a theme throws light on the evolution of the subject. In a pursuit to double the transistors periodically, the design representation has experienced a shift from transistors  à gates à RTL and now to synthesizable models. As

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10 Essential ingredients for developing VIPs

March 07, 2016, anysilicon

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The last post Verification IP : Build or Buy? initiated some good offline discussions over emails & with verification folks on my visit to customers. Given the interest, here is a quick summary of important items that needs to be taken care of while developing a VIP or evaluating one. Hopefully they will further

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Verification IP : Build or Buy?

January 28, 2016, anysilicon

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Consumerism of electronic products is driving the SoC companies to tape out multiple variants of products every year. Demand for faster, low power, more functionality and interoperability is forcing the industry to come up with standard solutions for different interfaces on the SoC. In past couple of years, tens of new protocols have

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