Belgrade, Serbia – July 20th, 2017 – HDL Design House, provider of digital, analog, and back-end design and verification services and products in numerous areas of SoC, and AFuzion, the safety-critical systems and certification company, have started a collaboration to simplify the complex DO-254 project requirements and reduce overall
You read the term “negative delay” and your engineer mind goes racing creating science fictions – time machine, time generator, non-causal machine and so on. Here are the answers – no, you can’t turn circuits with negative delays into a time-machine, you can’t go back in time, you can’t even
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Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced that the availability of its USB 3.1 PHY on UMC 28HPC process, as well as the silicon-verified USB 3.1 Type-C PHY with USB-PD 2.0 support on UMC 40LP process. Faraday introduced the industry’s first USB
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Last week was the Linley Processors Conference held in Santa Clara, CA. where vendors announced new products and technical details about new network architectures, security implementations, and novel memory devices were disclosed. Session 8 was titled “Open Instruction Sets” and featured a “pro” presentation by Krste Asanović, Professor, University of
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IP-Maker, the leading storage IP startup, will exhibit at Flash Memory Summit in Santa Clara, CA, on August 8 to 10. The next generation of non-volatile memories comes with an access time in the microsecond range. The NVM Express (NVMe) protocol has been introduced in order to minimize the protocol
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The talk of the town these days in the semiconductor industry isthe IBM’s lead in the research and development that has led to creation of a new type of transistors,the smallest ever 5nm construction, for the silicon based processor chips. This marvel by the researchers at IBM aims to revolutionize
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