Sharing is caring, unless it is as vital as required charge to function your ASIC design. As we move down from 20nm and below on designs with low voltages, charge sharing is quickly becoming mission critical problem in high performance custom ASIC designs using dynamic logic. Moderate charge sharing may slow down your circuits,
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Michael Porter developed the value chain concept in 1980 in his book “Competitive Advantage”. A value chain is a series of activities within a company in order to deliver a product or a service. The total value delivered by the company is the sum total of the value built up
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Qualcomm Incorporated (NASDAQ:QCOM) today announced the opening of Qualcomm Communication Technologies (Shanghai) Co. Ltd., a semiconductor test facility in the Waigaoqiao (WGQ) free-trade zone in Shanghai, and its first foray into providing manufacturing services for semiconductors. By working with Amkor Technology, Inc., one of the world’s leading providers of contract
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If you are involved in any ASIC/SOC design life cycle, it is highly likely that you would have heard questions like – Have you verified a feature? Is all feature testing completed? How will you validate a new feature? What design defects were found and how?
The terminologies Verification,
Semiconductor lithography and wafer mask set have developed dramatically in recent years. As technology migrated into nanometer geometries mask set price has increased exponentially.
The good news is that mask cost is decreasing every year due to maturity in production process and other factors such as market demand, competition
An infographics that shows the 10 top semiconductor companies sales in 1H of 2016. Please find a larger version of the inforgraphic here.