Some years ago the term “System On a Chip”, shortened to “SOC”, was coined to describe chips that integrated into themselves the functions of several other chips in an electronic system. The point of this was obviously to reduce cost and form factor in situations where the cost and effort
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This is an interview with Oliver King about understanding your ASIC’s age. As Moortec’s CTO, Oliver has been leading the development of compelling in-chip monitoring solutions to address problems associated with ever-shrinking System-on-Chip (SoC) process geometries. An analogue and mixed signal design engineer with over a decade of experience in low
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Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and
IP provider, and United Microelectronics Corporation (NYSE: UMC; TWSE: 2303)
(“UMC”), a leading global semiconductor foundry, today announced the
availability of Faraday’s 12.5Gbps programmable SerDes PHY IP on UMC’s 28HPC(U)
process technology. The success of Faraday’s 12.5G SerDes PHY
According to Gartner, the total average IC design cost for a 14nm chip is about $80 million, compared to $30 million for a 28nm planar device. Whilst many vendors will remain at 28nm, the ‘big guys’ have forged ahead with migrating to lower technology nodes. At the leading edge, R&D
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STMicroelectronics, (NYSE: STM) , a global semiconductor leader serving customers across the spectrum of electronic applications, today announced that it has acquired ams’ (SIX: AMS) assets related to NFC and RFID reader business. ST has acquired intellectual property, technologies, products and business highly complementary to its secure microcontroller solutions serving mobile devices,
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AnySilicon, the fastest-growing semiconductor vendors platform has announced today the availability of its free Semiconductor Package Price Estimator which provides package price for all major semiconductor packaging type.
Using this free tool, companies can get quick price estimation for the packaging and assembly prices which are becoming critical in many