Semiconductor startups SiFive and Morse Micro are joining forces to host a one-day tech symposium focusing on the RISC-V processor architecture. The event will take place in Sydney on Friday, June 21 at The Warren Centre for Advance Engineering at the University of Sydney, and will feature presentations by industry
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Neuchatel, 19 June 2019—Combining CSEM’s ultra-low-power ASIC design experience with the Extreme-Low Power (ELP) DDC technology from MIFS enables new world records in power consumption. A complete process design kit, along with a range of mixed-signal silicon IPs, is now available.
The phenomenal growth of the Internet of Things
In the wake of tariffs and trade tension between China and the United States, government officials and company representatives throughout China have doubled down on their resolve to quickly and meaningfully grow the nation’s domestic IC business in order to reduce its dependence on critical IC components currently supplied by
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Silex Silex Insight, a leading provider of AV over IP solutions, announces the extension of its family of ultra-low latency Audio/Video over IP OEM boards (called Viper), with the support of 2,5Gb and 10Gb Ethernet (in addition to 1GbE).
The Viper solution consists of encoder and decoder boards that
Belgrade, Serbia – June 11th, 2019 – HDL Design House, provider of digital, analog, and back-end design and verification services and products in numerous areas of SoC and complex FPGA designs, today announced the appointment of a new sales representative, Mr Wim Rijlaarsdam, for the territory of Belgium, the Netherlands and Israel.
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On-chip capacitors are a critical element in analog and mixed signal ASIC designs and playing a key role in helping engineers reach target performance. On-chip capacitors are limited in their quality and size and often introducing design challenges where engineers need to compromise capacitor type, chip cost and performance. This
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