If you are involved in any ASIC/SOC design life cycle, it is highly likely that you would have heard questions like – Have you verified a feature? Is all feature testing completed? How will you validate a new feature? What design defects were found and how?
The terminologies Verification,
Semiconductor lithography and wafer mask set have developed dramatically in recent years. As technology migrated into nanometer geometries mask set price has increased exponentially.
The good news is that mask cost is decreasing every year due to maturity in production process and other factors such as market demand, competition
An infographics that shows the 10 top semiconductor companies sales in 1H of 2016. Please find a larger version of the inforgraphic here.
I am sick and tired to hear the same buzzwords a zillion times every single day. IoT, Cognitive Computing, Cloud Computing, Fog Computing, Big Data, Artificial Intelligence, Smart-whatever (from objects to cities and pretty soon toilet paper, I’m afraid). What really makes me sick is that these buzzwords are used,
Read More
Ridgetop Group, Inc. and Silicon Valley-based BaySand Inc., the leader in application configurable application specific integrated circuits (ASICs), today announced they will work cooperatively to develop a series of new applications to increase their existing mixed-signal intellectual property core (IP) portfolios.
Through a wide-ranging partnership, they also will offer
GLOBALFOUNDRIES today announced a new 12nm FD-SOI semiconductor technology mode, extending its leadership position by offering the industry’s first multi-node FD-SOI roadmap. Building on the success of its 22FDXTM offering, the company’s next-generation 12FDXTM platform is designed to enable the intelligent systems of tomorrow across a range of applications, from mobile
Read More