Author Archives: anysilicon

Name: anysilicon

Mie Fujitsu Semiconductor and CSEM develop ULP solutions for IOT

Mie Fujitsu Semiconductor Ltd (MIFS) and CSEM have penned a joint development agreement to cooperate in the development of Deeply Depleted Channel (“DDC”) and near/sub-threshold technologies for the IOT/Wearables market. The agreement encompasses the development of ultra-low voltage, ultra-low power standard cell libraries, power management cells and memories as well

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Microchip Announces the Acquisition of Micrel

Chandler, Arizona and San Jose, California – May 7, 2015 – Microchip Technology Incorporated (NASDAQ: MCHP), a leading provider of microcontroller, mixed-signal, analog and Flash-IP solutions, and Micrel, Incorporated (NASDAQ: MCRL) today announced that Microchip has signed a definitive agreement to acquire Micrel for $14.00 per share. Micrel shareholders may

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Electrical Design and Modeling Challenges for 3D System Integration

Over the last several years, the buzzword in the electronics industry has been “More than Moore”, referring to the embedding of components into the package substrate and stacking of ICs and packages using wirebond and package on package (POP) technologies. This has led to the development of technologies that can

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Semiconductor Foundry Sales Ranking 2015

TSMC, by far, was the leader with $26.4 billion in sales last year.  In fact, TSMC’s 2015 sales were over 5x that of second-ranked GlobalFoundries (even with the addition of IBM’s chip business in the second half of 2015) and almost 12x the sales of the fifth-ranked China-based foundry SMIC.

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Chipmaker Allwinner is Enabling a $79 Laptop

Allwinner Technology, a Chinese fabless semiconductor company that design and manufacture SoC processors announced a new laptop that could cost $79. Since its founding in 2007, Allwinner has released more than 15  SoC processors that have been widely implemented in Android-based tablets, as well as in smartphones, laptops and more.
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High Bandwidth Memory – White Paper

High-bandwidth memory (HBM) is a JEDEC-defined standard, dynamic random access memory (DRAM) technology that uses through-silicon vias (TSVs) to interconnect stacked DRAM die. In its first implementation, it is being integrated with a system-on-chip (SoC) logic die using 2.5D silicon interposer technology.
 
In June 2015, AMD introduced its Fiji

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