Category Archives: Wafer and Foundries

TSMC slashes 20nm and 28nm pricing by up to 10%

tsmc

Taiwan Semiconductor Manufacturing Company (TSMC) has dropped its prices on 28nm and 20nm process technologies by 5-10% in hopes to secure additional orders from major companies which includes Qualcomm and MediaTek, according to DigiTimes. However, the reaction of 28nm prices will most likely affect AMD and Nvidia positively, who are

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Multi Project Wafer – History, Overview & Booking System

wafer

Multi Project Wafer (MPW) emerged in the 1970’s to help companies and researchers prototype their silicon and demonstrate their work. It was the early days of the semiconductor industry when firms like Fairchild, IBM and others were applying technology innovation to create smaller, faster and cheaper chips. Back then, Multi-Project

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TSMC to Secure Major Apple A10 Chip Orders in 2016

girls holding a phone

The world’s largest contract chip maker, Taiwan Semiconductor Manufacturing Co (TSMC), is being expected to secure more than half of all of Apple’s new mobile chip in 2016. This is due to their better production roadmap planning. They’re expecting that since the Taiwanese manufacturer has a clear roadmap for their

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Xilinx Expected to Introduce new 7nm Products in 2017

The war between TSMC and Samsung is heating up and it’s expected to last well throughout the decade. The war only got hotter when TSMC announced that they will begin producing 7nm processors in 2017. Xilinx will be their very first customer.
Xilinx Inc. made the announcement late yesterday that

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Semiconductor Wafer – Overview and Facts

Semiconductor wafer is absolutely invisible in our daily life but it exists in a form of an ASIC or an IC in each and every electronic device we use. Semiconductor wafer is a round piece of silicon which consists of silicon dies that are designed to perform a very specific

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GLOBALFOUNDRIES Release Schedule for 14nm

The 14nm technology development between Samsung and GlobalFoundries that started last year is now reaching its final step by releasing the availability schedule of the process technology including the 2 main flavors.
 

 
The primary concept of the strategic collaboration is to make 14nm FinFET technology available at

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