Overview: Qualcomm Atheros, Inc. is seeking a Test Engineer to develop automated production test solutions for RF transceivers and mixed signal devices. This role involves supporting the launch of new products into high-volume production and enhancing existing solutions.
Read MoreOverview: We are seeking an experienced ASIC Design for Test Engineer to join our customer team. This role focuses on the architecture and implementation of Design for Test (DFT) solutions for ASIC designs, ensuring robust test coverage and validation of test patterns.
Read MoreOverview: NVIDIA is seeking a Senior ASIC Power Engineer to design hardware accelerators and processors for next-generation mobile, embedded, and datacenter platforms. This role offers the chance to significantly impact various product lines, including consumer graphics, self-driving cars, and artificial intelligence.
Read MoreOverview: Lockheed Martin Space is seeking an ASIC & FPGA Associate Engineering Manager to lead a talented team in the Silicon Solutions division. This role focuses on managing SOC, ASIC, and FPGA projects, ensuring successful execution of microchip solutions tailored to customer needs. The position is based in Sunnyvale, Denver, or Highlands Ranch, CO, and requires full-time in-office work with a flexible 9x80 schedule.
Read MoreOverview: Normal Computing is at the forefront of developing innovative software and hardware solutions for the semiconductor industry and AI infrastructure. With teams across major global cities, we are focused on creating ASICs specifically designed for image and video diffusion inference, challenging the conventional GPU paradigm. We seek a talented individual to contribute to the architecture and microarchitecture of our AI accelerator compute blocks, ensuring our research translates into tangible silicon solutions.
Read MoreOverview: Join our innovative team as an Analog/Mixed-Signal IC Design Engineer, focusing on developing high-performance ADC/DAC, RF transmitter/receiver, and mixed-signal signal-chain building blocks for advanced communication and sensing systems. This role involves working with deep submicron CMOS technologies (22 nm, 12 nm, 7 nm) and encompasses architecture definition, circuit design, modeling, layout support, verification, tapeout, and silicon validation. Ideal for experienced engineers with a strong background in high-speed ADC/DAC design and hands-on lab testing capabilities.
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