Package failure analysis is the systematic investigation of defects and failures originating within semiconductor packaging, interconnects, solder connections, die attach, bond wires, redistribution layers and other structures that connect the semiconductor die to the outside system.
A semiconductor device may fail electrical testing even though the silicon itself is functioning correctly. The actual failure can exist anywhere along the electrical path through the package, including a solder ball, bump, bond wire, package substrate, via, redistribution layer, die attach structure or internal interconnect.
The purpose of semiconductor package failure analysis is to determine where the failure is located, what physical defect caused it and why the defect occurred.
Common package-level failures include:
→ Electrical opens
→ Electrical shorts
→ Resistive connections
→ Solder-joint defects
→ BGA solder-ball failures
→ Bond-wire failures
→ Package delamination
→ Die-attach defects
→ Package cracks
→ Underfill defects
→ Bump and microbump defects
→ Redistribution-layer defects
→ Via and package-substrate failures
→ Interposer and TSV-related defects
What Is Package Failure Analysis?
Package failure analysis investigates failures associated with the structures surrounding and connecting the semiconductor die rather than immediately assuming that the defect is located inside the integrated circuit itself.
This distinction is critical because package material usually has to be partially or completely removed before the semiconductor die can be physically examined.
If destructive decapsulation or cross-sectioning begins too early, an important package defect may be destroyed before it is documented.
A good package FA therefore starts with the least destructive methods and progressively moves toward physical analysis only after sufficient evidence has been collected.
Typical Package Failure Analysis Flow
Package FA is most effective when performed as a structured process rather than as a collection of unrelated laboratory tests.
Failure history and background review
↓
As-received optical inspection
↓
Non-destructive X-ray / C-SAM / IR inspection
↓
Electrical failure reproduced and characterized
↓
Open / short / resistive failure classified
↓
Fault localization performed
↓
Suspected package location identified
↓
Controlled destructive analysis begins
↓
Cross-section / FIB / SEM / material analysis
↓
Physical failure mechanism identified
↓
Root cause established
The specific techniques selected depend on the package type and electrical failure signature.
Start With the Failure History
Understanding how the device failed can significantly reduce unnecessary laboratory work.
Before analysis begins, useful questions include:
→ When did the device fail?
→ Did it fail during manufacturing, reliability testing or field use?
→ Did the failure occur after reflow?
→ Was the device exposed to temperature or humidity stress?
→ Did the failure appear after mechanical handling?
→ Is the failure reproducible?
→ Have similar failures occurred in the same lot?
→ Are known-good comparison samples available?
Package drawings, assembly information, reliability history and electrical test results can all help determine where the investigation should begin.
Why Non-Destructive Inspection Comes First
Handling, electrical probing, package opening and cross-sectioning can all change the physical condition of a failed device.
For this reason, the as-received package should be thoroughly documented before destructive analysis begins.
Common non-destructive package FA techniques include:
→ External optical inspection
→ X-ray inspection
→ 3D X-ray / CT
→ C-SAM / Scanning Acoustic Microscopy
→ Infrared microscopy
These methods can reveal package defects before the sample is physically altered.
External Optical Inspection
Optical inspection is one of the simplest but most important steps in package failure analysis.
The package should be inspected from multiple directions to document:
→ Package markings
→ Solder balls or leads
→ Package edges
→ Visible cracks
→ Chipping
→ Contamination
→ Corrosion
→ Mechanical damage
The inspection also creates a record of the device’s condition before subsequent FA handling potentially changes the sample.
X-Ray Inspection for Package Failure Analysis
X-ray inspection is one of the most widely useful non-destructive package-analysis techniques because it can reveal internal structures that cannot be seen optically.
Depending on package construction and X-ray capability, the analyst may inspect:
→ BGA solder balls
→ Solder voids
→ Poorly formed solder joints
→ Bond-wire routing
→ Broken or displaced bond wires
→ Die-attach regions
→ Metal bridging
→ Redistribution-layer structures
→ Internal package interconnects
Both top-down and angled or side-view imaging can be useful because different viewing directions reveal different features.
For complex packages, three-dimensional X-ray imaging can provide additional information when overlapping structures make conventional 2D images difficult to interpret.
C-SAM for Package Delamination, Cracks and Voids
Scanning Acoustic Microscopy is particularly valuable for defects involving package interfaces.
Acoustic waves travel through the package and reflect when they encounter interfaces between materials with different acoustic properties.
C-SAM can be especially sensitive to:
→ Delamination
→ Air gaps
→ Voids
→ Internal cracks
→ Die-attach separation
→ Underfill defects
→ Mold-compound interfaces
→ Some bump-related defects
A major advantage is that acoustic microscopy can detect certain cracks and interface separations that may not be visible in an X-ray image.
For BGA and other thin multilayer packages, both reflected acoustic signals and through-transmission techniques may be useful depending on package construction.
X-Ray vs. C-SAM for Package Failure Analysis
X-ray and C-SAM are complementary rather than competing package FA techniques.
| Suspected Defect |
Technique Often Considered |
| Solder-ball geometry |
X-ray |
| Solder void |
X-ray / CT |
| Bond-wire problem |
X-ray |
| Package delamination |
C-SAM |
| Internal package crack |
C-SAM, sometimes supported by X-ray or IR |
| Die-attach interface |
C-SAM and/or X-ray depending on failure type |
| Complex 3D package structure |
3D X-ray / CT plus other techniques as required |
Infrared Microscopy for Package Inspection
Infrared imaging can provide additional non-destructive information when the package configuration allows optical access through silicon.
It can be useful for observing cracks or damage that are difficult to inspect using visible-light microscopy.
Infrared inspection can be especially valuable for wafer-level and exposed-substrate package configurations.
Electrical Verification of a Package Failure
After the incoming condition of the package has been documented, the reported electrical failure should be reproduced whenever possible.
The objective is to understand the electrical signature before selecting a fault-localization technique.
Useful electrical distinctions include whether the failure is:
→ A complete open
→ A resistive open
→ A short circuit
→ A resistive leakage path
→ Non-linear
→ Intermittent
The failure signature can significantly change the next analysis step.
Open-Circuit Package Failures
An electrical open means that the intended signal path has been interrupted somewhere between the external package connection and the semiconductor die or within a package interconnect structure.
Potential locations include:
→ Solder joint
→ Solder ball
→ Bump or microbump
→ Bond wire
→ Via
→ Package-substrate trace
→ Redistribution layer
→ Interposer connection
→ TSV-related structure
A simple continuity measurement proves that the open exists but may provide very little information about its physical location.
Additional fault-localization methods may therefore be required before cross-sectioning begins.
Short-Circuit Package Failures
A package short occurs when two normally isolated electrical structures become unintentionally connected.
Possible package-level causes include:
→ Metal bridging
→ Solder bridging
→ Conductive contamination
→ Damaged package routing
→ Bump or microbump bridging
→ Conductive dendritic growth
The objective of fault isolation is to determine where the unintended current leaves the expected electrical path.
Time Domain Reflectometry for Package Opens and Shorts
Time Domain Reflectometry (TDR) can help estimate the location of an impedance discontinuity along an electrical path.
An electrical pulse is launched into the circuit and the reflected response is analyzed as a function of time.
Depending on the electrical signature, the response can help indicate:
→ An open circuit
→ A short circuit
→ An impedance discontinuity
→ Approximate distance to the defect
TDR can therefore help narrow a long package interconnect before destructive physical analysis begins.
EOTPR for Higher-Resolution Package Fault Localization
Electro-Optical Terahertz Pulse Reflectometry can provide higher spatial resolution than conventional TDR for suitable package-interconnect structures.
This is particularly useful as package interconnects become smaller and defects occur in structures such as microbumps, package-to-board connections and die-to-die interconnects.
Thermal Fault Localization in Package FA
A resistive defect carrying current generates heat.
Thermal fault-localization techniques can therefore help identify electrically active package defects that dissipate power.
Applications may include:
→ Resistive shorts
→ Resistive interconnects
→ Leakage paths
→ Localized package hot spots
Lock-in thermography can improve sensitivity when the temperature rise from the defect is extremely small.
Magnetic Current Imaging
Electrical current produces a magnetic field.
Magnetic current imaging can use this field to reconstruct the current path through a packaged semiconductor device.
Because magnetic fields can pass through many package materials, the technique can support non-destructive investigation of deeply buried current paths.
A short can potentially be identified when measured current deviates from the path expected from the package design.
This becomes particularly valuable in complex BGA, 2.5D and 3D package structures where direct optical access to the failing conductor is impossible.
Choosing a Technique Based on the Electrical Failure
| Failure Signature |
Possible FA Direction |
| Complete open |
TDR, EOTPR, capacitance methods, magnetic current imaging, X-ray where applicable |
| Resistive open |
Electrical characterization, TDR, thermal techniques, targeted physical analysis |
| Short |
Magnetic current imaging, X-ray, thermal localization or other current-path techniques |
| Resistive / non-linear failure |
Thermal localization, OBIRCH in suitable structures, TDR and electrical probing |
| Delamination or crack suspected |
C-SAM followed by targeted cross-sectioning if necessary |
| Solder / bump geometry suspected |
X-ray / CT followed by physical cross-sectioning where required |
BGA Failure Analysis
Ball Grid Array packages can present a particular FA challenge because the solder connections are located underneath the package and cannot be inspected directly with conventional optical microscopy.
BGA failure analysis may investigate:
→ Solder-ball opens
→ Solder bridges
→ Voids
→ Cracks
→ Package-substrate failures
→ Internal vias
→ Die attach
→ Delamination
X-ray is commonly one of the first inspection methods, while C-SAM, electrical localization and cross-sectioning can provide complementary information depending on the failure.
QFN Package Failure Analysis
QFN packages can exhibit failures associated with external connections, die attach, internal wire bonds, lead-frame structures and molding interfaces.
Depending on the electrical signature, analysis may involve:
→ Optical inspection
→ X-ray
→ C-SAM
→ Electrical verification
→ Decapsulation
→ Cross-sectioning
→ SEM analysis
WLCSP Failure Analysis
Wafer-Level Chip Scale Packages reduce package dimensions but can create difficult analysis problems because package and semiconductor structures are tightly integrated.
Potential defects may involve:
→ Solder bumps
→ Redistribution layers
→ Die-edge damage
→ Cracks beneath bumps
→ Mechanical stress damage
High-resolution X-ray, acoustic microscopy and infrared inspection can all provide useful non-destructive information before destructive analysis begins.
Flip-Chip Failure Analysis
Flip-chip structures contain dense arrays of electrical connections between the die and package substrate.
Possible defects include:
→ Bump opens
→ Bump shorts
→ Underfill cracking
→ Interfacial delamination
→ Package-substrate problems
→ Die cracking
The density of the interconnect structure makes good fault localization especially important before cross-sectioning.
2.5D and 3D Package Failure Analysis
Advanced 2.5D and 3D packages introduce additional failure-analysis challenges because a single electrical path may travel through several interconnected structures.
The path may include:
→ Package substrate
→ Solder connections
→ Interposer
→ Microbumps
→ Through-silicon vias
→ Multiple semiconductor dies
A simple continuity failure can therefore have many possible physical locations.
Electrical characterization can first establish whether the path is open, resistive or non-linear. This information can then guide the selection of TDR, EOTPR, magnetic imaging, thermal localization or another method.
Non-destructive imaging such as C-SAM and 3D X-ray can then be used to corroborate the suspected region before irreversible deprocessing begins.
Why Advanced Packaging Makes FA More Difficult
As package complexity increases, the failure site may be deeply buried and separated from the external package connection by many electrically and mechanically different structures.
This creates several challenges:
→ More potential failure locations
→ Overlapping structures in X-ray images
→ Reduced direct optical access
→ Longer or more complex electrical paths
→ Greater risk of destroying the defect during sample preparation
→ Smaller bump, via and interface dimensions
Advanced packages therefore benefit strongly from combining electrical fault isolation with non-destructive imaging before physical cross-sectioning.
When Destructive Package Analysis Should Begin
Once destructive analysis begins, the sample cannot simply be returned to its original condition.
Electrical measurements may no longer be reproducible after package material, interconnect structures or portions of the package have been removed.
The decision to begin destructive analysis should therefore be based on sufficient confidence that the suspected Region of Interest contains the failure.
Destructive analysis may involve:
→ Package opening
→ Lid removal
→ Mechanical milling
→ Mechanical cross-sectioning
→ FIB cross-sectioning
→ Plasma FIB for larger structures
→ SEM analysis
→ TEM analysis where nanoscale characterization is required
Mechanical Cross-Sectioning
Mechanical cross-sectioning is one of the standard physical-analysis techniques for package failures.
It can expose structures such as:
→ Solder joints
→ Bumps
→ Die attach
→ Package vias
→ Substrate layers
→ Underfill
→ Package interfaces
Accurate positioning matters. If the cross-section misses a small defect, the sample may be consumed without revealing the root cause.
Preparation artifacts must also be considered when interpreting cracks, smearing or deformation near the polished surface.
FIB Cross-Sectioning for Package Defects
Focused Ion Beam techniques can provide more localized material removal when the suspected defect has already been narrowed to a relatively small area.
FIB may be useful for examining:
→ Microbumps
→ Small vias
→ Fine interconnect structures
→ Interfaces
→ Localized package defects
For larger advanced-package structures, plasma FIB can provide higher material-removal rates while retaining site-specific control.
SEM Analysis of Package Defects
After a package defect has been exposed by cross-sectioning or deprocessing, Scanning Electron Microscopy can provide high-resolution physical inspection.
SEM may reveal:
→ Cracks
→ Voids
→ Interface separation
→ Abnormal solder morphology
→ Interconnect damage
→ Corrosion
→ Foreign material
When combined with EDS/EDX, the analyst can also investigate the elemental composition of suspicious particles, residues or material layers.
TEM for Advanced Package Defects
Most package defects do not require TEM, but advanced package structures can contain nanoscale interface or interconnect abnormalities that cannot be conclusively characterized with lower-resolution methods.
Once the defect has been accurately localized, FIB can prepare a thin site-specific sample for TEM or STEM analysis.
Common Package Defects and Analysis Techniques
| Package Defect |
Useful Analysis Techniques |
| Package delamination |
C-SAM, cross-sectioning, SEM |
| Solder void |
X-ray / CT, cross-sectioning |
| Solder crack |
C-SAM in suitable structures, X-ray, cross-sectioning, SEM |
| Bond-wire failure |
X-ray, electrical testing, decapsulation, optical / SEM inspection |
| Die-attach defect |
X-ray, C-SAM, cross-sectioning |
| BGA open |
Electrical characterization, X-ray, TDR/EOTPR, targeted cross-section |
| Package short |
X-ray, magnetic current imaging, thermal localization, electrical probing |
| Microbump defect |
TDR/EOTPR, X-ray/CT, FIB/PFIB, SEM |
| Underfill crack or delamination |
C-SAM, cross-sectioning, SEM |
| Contamination / corrosion |
Optical inspection, SEM-EDS and additional material analysis |
| TSV / interposer defect |
Electrical fault isolation, 3D X-ray, PFIB, SEM, TEM where required |
Package Failure vs. Silicon Failure
An electrical failure observed at the external pins does not automatically mean that the IC itself is defective.
The electrical path from the PCB to an internal transistor can contain many package-level structures.
For example:
PCB connection
↓
Solder ball / package lead
↓
Package substrate
↓
Via / redistribution structure
↓
Bond wire or bump
↓
Die pad
↓
IC circuitry
A defect anywhere along this chain can produce an external electrical failure.
This is why package failure modes should be investigated before package material is removed solely to gain access to the silicon.
Reliability-Test Package Failures
Package failures are frequently discovered during environmental and reliability testing.
Failures may become visible after stresses involving:
→ Temperature cycling
→ Humidity
→ Reflow
→ Mechanical stress
→ Thermal expansion and contraction
Understanding the exact stress history is valuable because it can help connect the observed defect to the physical mechanism that created it.
Package Failure Analysis Is More Than Finding a Defect
Finding a crack, void or damaged connection does not automatically complete the failure analysis.
The physical defect should be correlated with the measured electrical failure and the manufacturing or operating history.
The investigation should ultimately answer:
→ Did this defect actually cause the failure?
→ What physical failure mechanism produced the defect?
→ At what process or operating stage was it created?
→ Could similar devices be affected?
→ What corrective action can prevent recurrence?
How Much Does Package Failure Analysis Cost?
The cost of package failure analysis varies significantly because a straightforward X-ray inspection and a full advanced-package root-cause investigation have very different scopes.
Important cost factors include:
→ Package type
→ Number of samples
→ Failure reproducibility
→ Required electrical characterization
→ X-ray / CT requirements
→ C-SAM inspection
→ Fault-localization complexity
→ Mechanical cross-sectioning
→ FIB / PFIB work
→ SEM / EDS or TEM analysis
→ Required turnaround time
A laboratory normally needs the failure description and package information before it can provide a meaningful quotation.
What Information Should You Send to a Package Failure Analysis Lab?
Providing the following information can help the laboratory choose an efficient analysis route:
→ Package type
→ Package drawing if available
→ Device and application
→ Failure signature
→ Whether the failure is open, short, resistive or intermittent
→ Measured resistance / current information
→ When the failure occurred
→ Reliability or environmental stress history
→ Previous X-ray / SAM / electrical results
→ Number of failed samples
→ Known-good reference samples
→ Required turnaround time
How to Choose a Package Failure Analysis Company
The right packaging failure analysis company depends on the package and failure type.
Useful capabilities to consider include:
→ Semiconductor package FA experience
→ BGA / QFN / WLCSP expertise
→ Flip-chip experience
→ Advanced packaging capability
→ High-resolution X-ray / CT
→ C-SAM
→ Electrical fault isolation
→ TDR / advanced reflectometry where required
→ Mechanical cross-sectioning
→ FIB / PFIB
→ SEM / EDS
→ TEM capability for nanoscale defects
A laboratory capable of combining several techniques can be particularly useful when the failure mechanism is initially unknown.
Frequently Asked Questions About Package Failure Analysis
What is semiconductor package failure analysis?
Semiconductor package failure analysis investigates defects within the structures that package, protect and electrically connect an integrated circuit. These include solder joints, bumps, bond wires, die attach, package substrates, vias, redistribution layers, underfill and advanced package interconnects.
What techniques are used for package failure analysis?
Common techniques include optical inspection, X-ray, 3D CT, C-SAM, infrared inspection, electrical characterization, TDR/EOTPR, thermal fault localization, magnetic current imaging, cross-sectioning, FIB, SEM, EDS and TEM where required.
What is the best technique for BGA failure analysis?
There is no single best technique. X-ray is particularly useful for inspecting hidden solder joints and internal structures, while C-SAM, electrical fault localization and cross-sectioning may be required depending on the suspected defect.
Can X-ray detect package defects?
Yes. X-ray inspection can reveal many hidden package structures and defects including solder-ball abnormalities, voids, bond-wire problems, die-attach issues and metal bridging.
When should C-SAM be used?
C-SAM is particularly useful when the suspected defect involves an internal interface, crack, void or delamination.
Can a package open be localized without destroying the package?
In many cases the location can be narrowed using electrical measurements and techniques such as TDR, EOTPR, X-ray, acoustic imaging or magnetic methods before destructive analysis begins.
Why shouldn’t the package be cross-sectioned immediately?
Cross-sectioning permanently changes the sample. If the suspected failure has not been accurately localized, the section can miss or destroy the defect and the original electrical failure may no longer be reproducible.
Can advanced 2.5D and 3D packages be failure analyzed?
Yes, but the analysis can be significantly more complex because electrical paths may pass through substrates, interposers, microbumps, TSVs and multiple dies. A combination of electrical fault isolation, non-destructive imaging and site-specific physical analysis may be required.
Does package failure analysis determine root cause?
The objective is not simply to locate the defect but to connect the physical failure mechanism with the device history or manufacturing process so that the actual root cause and appropriate corrective action can be determined.
Need Package Failure Analysis Services?
If you have a failing BGA, QFN, WLCSP, flip-chip, multi-die or advanced semiconductor package, AnySilicon can help connect your requirement with semiconductor failure analysis laboratories.
Package FA requests may include:
→ Complete package failure analysis
→ BGA failure analysis
→ X-ray / 3D CT inspection
→ C-SAM inspection
→ Solder-joint analysis
→ Package delamination analysis
→ Bond-wire failure analysis
→ Die-attach analysis
→ Electrical open / short localization
→ TDR / EOTPR
→ Mechanical cross-sectioning
→ FIB / PFIB package analysis
→ SEM / EDS
→ Advanced packaging failure analysis
Describe the package, failure signature and analysis already performed. If you do not know which FA technique is required, provide the electrical and physical symptoms rather than selecting equipment yourself.
