October 22, 2020, anysilicon
sinchu, Taiwan (October 22, 2020) –eMemory has been recognized by TSMC as a recipient of a 2020 OIP Partner of the Year award for Embedded Memory IP. The OIP Partner of the Year awards honor TSMC Open Innovation Platform® (OIP) ecosystem partners like eMemory, demonstrating excellence in next-generation system-on-chip (SoC) and
Read MoreOctober 21, 2020, anysilicon
Back in September 2019 semiengineering.com published an article called “The Hidden Potential of Test Engineers”. This article was of particular interest to me having previously worked as a mixed signal test development engineer.
Within the article Carl Moore explained that test engineers have the potential to increase revenue. My view
October 19, 2020, anysilicon
Date: 21st October, 11am in Paris, 5PM in Taiwan/ Singapore
Link: https://us02web.zoom.us/webinar/register/WN_NcVhC29ZQoaEm3fXEeAqBQ
Title: Attack Surface & Levels of Security Required Per Vertical for AI, IoT & Automotive
Security is becoming very important for many markets such as IoT, Automotive and AI. This security should be defined at the
Read MoreOctober 19, 2020, anysilicon
The historic Apollo 11 spacecraft, which placed the first human on the moon, was powered by a computer that weighed 70 pounds, had 64 kilobytes of memory, and a few tens of thousands of transistors. Compared to this, an average smartphone with a couple of gigabytes of RAM and the
Read MoreOctober 14, 2020, anysilicon
IC Insights recently released its September Update to the 2020 McClean Report that presented the second of a two-part analysis on the global IC foundry industry and included a look at the pure-play foundry market by region.
China was responsible for essentially all of the total pure-play foundry market increase in 2018. In
October 07, 2020, anysilicon
SAN MATEO, Calif.–OpenFive, the leading provider of customizable, silicon-focused solutions with differentiated IP, along with AnalogX, a provider of SerDes interface IP, today announced a complete sub-system solution and implementation for Chip-to-Chip (C2C) interface with ultra-low latency and power. This solution can be optimized for various bandwidth requirements of
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