Category Archives: Testing

The True Cost of IC Test

December 14, 2017, anysilicon

test floor

The other day I was having lunch with a friend I had not seen in some time who had recently come back from a ten-day trip overseas. This was his sixth such trip in the past twelve months made to check on production test activities at the OSAT his company

Read More

DA-Integrated Selects Chroma 3650 Test System

November 13, 2017, anysilicon


DA-Integrated, a full-service IC Design, Supply and Test services provider in Ottawa, Canada and Chroma, a Tier 1 Taiwanese Test Equipment manufacturer announce today that DA-Integrated has selected and installed the Chroma 3650 series ATE system. The Chroma 3650’s highly flexible configuration, and best in class production test rates make

Read More

Guide to Semiconductor Wafer Sort

October 19, 2017, anysilicon

probe card

Wafer sort (or wafer test), is a part of the testing process performed on silicon wafers. Wafer sort is a simple electrical test, that is performed on a silicon die while it’s in a wafer form.
Wafer sort’s main purpose is to identify the non-functional dies and thereby avoiding

Read More

Presto Engineering Announces Management Expansion

June 29, 2017, anysilicon

preseto management

Presto Engineering, Inc., an outsourced operations provider to semiconductor and Internet of Things (IoT) device manufacturers, announces a management expansion: Cedric Mayor has been named Chief Operating Officer (COO) and Martin Kingdon has been appointed VP Sales.
“We have experienced growing demand for IoT and related turnkey production &

Read More

Presto Engineering Launches New Image Sensor Turnkey Services

June 16, 2017, anysilicon


Presto Engineering Inc., an outsourced operations provider to semiconductor and Internet of Things (IoT) device manufacturers, now offers a turnkey industrialization service for image sensors. The industry has experienced an increase in demand for these sensors, which are often used in devices that connect to the internet (IoT).

Read More

IC Test Flow For Advanced Semiconductor Packages

May 24, 2017, anysilicon


Higher bus speeds and lower power consumption are design criteria for most modern digital electronic products. Packaging solutions that provide higher bus speeds at reduced power per bit ratios require design techniques that shorten the distance between chips (to reduce drive currents) and use wider data buses (with finer line-space

Read More