Senior ASIC Design Verification Engineer

Blue Origin is seeking a Senior ASIC Verification Engineer to lead the verification of complex digital subsystems for space-based communication ASICs. This role emphasizes collaboration, safety, and innovation in developing reusable and low-cost space vehicles. The ideal candidate will possess strong expertise in advanced verification methodologies and work closely with multidisciplinary teams to ensure high-quality silicon.

Responsibilities:

• Lead verification planning and execution for complex blocks or subsystems.
• Develop sophisticated UVM environments, reference models, scoreboards, protocol monitors, and assertions.
• Translate architecture and design specifications into comprehensive verification strategies and measurable coverage goals.
• Drive functional coverage closure, regression health, and verification signoff readiness.
• Identify verification gaps, corner cases, and high-risk scenarios early in the development cycle.
• Collaborate closely with design, systems, DFT, firmware, and physical design teams.
• Review testbench architecture, stimulus quality, and debug methodologies for technical excellence.
• Mentor junior engineers in verification standard processes.
• Support bring-up, emulation, prototyping, and post-silicon debug activities as needed.

Qualifications:

• BS or MS in Electrical Engineering, Computer Engineering, or related field.
• 5–8+ years of ASIC/SoC verification experience.
• Deep hands-on expertise in System Verilog and UVM.
• Strong understanding of verification planning, assertions, and coverage closure.
• Experience verifying complex digital control and datapath logic.
• Proven debugging capability across RTL, testbench, and system interactions.
• Ability to work effectively across multidisciplinary engineering teams.

Skills:

• Background in space-based communications, wireless communications, or modem/baseband hardware.
• Experience verifying LDPC/BCH/FEC blocks, framing engines, beamforming logic, or DSP pipelines.
• Familiarity with formal verification tools and methodologies.
• Experience with low-power verification, CDC/RDC verification, or reset-domain behavior.
• Knowledge of high-speed interface verification and hardware/software interactions.