Published Date: February 01, 2026
NVIDIA, Santa Clara, CA 95050•Hybrid work
Job Description:
NVIDIA is seeking an exceptional ASIC Engineer to join its Clocks team, responsible for designing and optimizing clocking for GPU and CPU architectures. This role involves collaboration across multiple teams to enhance the performance and efficiency of NVIDIA's innovative chips, contributing to the company's mission of amplifying human creativity and intelligence through advanced computing technologies.
Responsibilities:
- Architect clock domains to meet functional, physical, and testing design requirements.
- Collaborate with design teams to ensure clocking meets architectural and physical constraints.
- Evaluate and improve Power, Performance, and Area (PPA) of NVIDIA chips by analyzing trade-offs in design.
- Work with physical design and timing teams to address clocking concerns and develop high-speed solutions.
- Deliver clock RTL information to verification, timing, and DFT teams.
- Participate in the complete ASIC execution cycle from micro-architecture to silicon bring-up.
Qualifications:
- BS or higher in Electrical Engineering or equivalent experience.
- Understanding of logic optimization techniques and PPA trade-offs.
- Experience in RTL design (Verilog), verification, and logic synthesis.
Skills:
- Excellent interpersonal skills for effective collaboration.
- Strong coding skills in Python or other scripting languages.
- Knowledge of sub-micron silicon issues like noise and cross-talk is a plus.
