Blog

Credo selects Moortec’s In-Chip Monitoring IP to optimise performance and reliability in their latest generation of SerDes chips

December 11, 2018, anysilicon

news

Moortec, provider of complete In-Chip Monitoring PVT Subsystems announced today that Credo  has utilised Moortec’s Temperature Sensor and Voltage Monitor IP to optimise performace and increase reliability in their latest generation of SerDes chips.
 

 
Credo offers high-performance, mixed-signal semiconductor solutions including advanced serializer-deserializer (SerDes) IP and interconnect

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Faraday Reveals Its Multi-protocol Video Interface IP on UMC 28HPC

December 11, 2018, anysilicon

press release

Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced the availability of its multi-protocol video interface IP on UMC 28nm HPC. The Multi-Protocol Video Interface IP solution supports both transmitter (TX) and receiver (RX) featuring a reduced silicon footprint ideal for state-of-the-art panel and

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Beckermus Technologies Announces Partnership with Engage Photonics

December 09, 2018, anysilicon

news

Beckermus Technologies was founded in 1998 and serves as an Excellence Center in the field of “Bare Die” assembly services for micro-electronic and micro-optical systems. Beckermus Technologies has been playing a vital role in the lifecycle of many products, for numerous companies worldwide, from early prototypes to mass production.
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CoreHW releases IP library with over 200 IP

December 06, 2018, anysilicon

Many old CPU chips and obsolete computer processors as background

CoreHW releases an IP library with over 200 silicon verified IP. Silicon proven solutions allow fast end-product development and implementation. The IP library gives a comprehensive look to company’s IP range and makes it easier and faster for customers to start their ASIC design process.
 
The IP listed in

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How Best-In-Class Companies Reduce ASIC Power Consumption – White Paper

December 05, 2018, anysilicon

computer cpu or central processor unit chip on mainboard.Technology background with computer processors CPU concept and blue circuit, board texture.

Power, performance and area (PPA) are three core competencies on which an ASIC design is evaluated. In an ideal world, ASIC designers strive to improve the performance of their design in a minimum possible silicon area with lowest possible power dissipation. However, there exists a trade-off between these three key

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Semiconductor lithography equipment market: how megatrends are going to change the future

November 30, 2018, anysilicon

The man with a carrier of the silicone wafers

The overall semiconductor equipment market is today worth several billion dollars. By contrast, the permanent bonding, temporary bonding and debonding and lithography equipment market for the MtM industry is a small niche representing millions of dollars. However, megatrend markets push MtM devices to new levels of complexity, resulting in big

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