Belgrade, Serbia – October 1st, 2019 – HDL Design House, provider of digital, analog, and back-end design and verification services and products in numerous areas of SoC and complex FPGA designs, announced the appointment of Frank Werner as Worldwide Sales Director, effective immediately. With more than 25 years of experience in different
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Lead Frame Overview
A lead frame is a generic term for a type of (mostly) low-cost IC package assembly used for DIL types packages as well as PLCCs and QFNs.
The frame is typically made of a thin layer of copper, though other materials, such as aluminum
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Belgium, September 26, 2019 – Sofics bvba (www.sofics.com), a leading semiconductor integrated circuit IP provider announced that it has expanded its TakeCharge® Electrostatic Discharge (ESD) and Analog I/O portfolio with solutions for TSMC’s N5 process technology. The cells enable high speed and high frequency interfaces.
Today many communication channels,
Taiwan Semiconductor Manufacturing Company’s heavy investments in advanced wafer-fab technology are set to pay off significantly for the world’s largest silicon foundry as it continues the production ramp of 7nm ICs in the second half of this year, according to an analysis in IC Insights’ September Update to the 2019 McClean Report.
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Neuchatel, 24 September 2019 – CSEM, a leader in low-power RFIC design and embedded systems, announced today at GLOBALFOUNDRIES (GF) annual Global Technology Conference (GTC) that CSEM is developing ultra-low power Bluetooth Low Energy® (BLE), CMOS radar mmWave IP and embedded
machine-learning accelerators on GLOBALFOUNDRIES (GF) 22nm FD-SOI (22FDX®) platform.
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Plymouth, UK, 23rd September 2019 — Moortec, a leading provider of in-chip monitoring and optimisation IP, today announced the availability of its latest In-Chip Monitoring IP Subsystem on TSMC’s N5 and N5P process technologies.
A global acceleration in cutting-edge technologies including 5G, Artificial Intelligence (AI), Machine Learning and Data Centre