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X-FAB to Acquire Assets of Altis Semiconductor

X-FAB Silicon Foundries has today announced that it will acquire the assets of Altis Semiconductor, a specialty stand-alone foundry located in the Greater Paris area, out of insolvency proceedings.

With both companies serving complementary markets and applications, this acquisition enriches X-FAB’s offering. It roughly doubles the

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Top Semiconductor Foundries Growth 2015-2016 (per process node)

IC Insights recently released its September Update to the 2016 McClean Report. This Update included Part 2 of an extensive analysis of the IC foundry business.  An excerpt from the September Update, describing foundry sales by feature size, is shown below.
 
The following 2 charts show

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Is Charge Sharing Silently Killing your ASIC Design?

Sharing is caring, unless it is as vital as required charge to function your ASIC design. As we move down from 20nm and below on designs with low voltages, charge sharing is quickly becoming mission critical problem in high performance custom ASIC designs using dynamic logic. Moderate charge sharing may slow down your circuits,

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Fabless Semiconductor Company Value Chain

Michael Porter developed the value chain concept in 1980 in his book “Competitive Advantage”. A value chain is a series of activities within a company in order to deliver a product or a service. The total value delivered by the company is the sum total of the value built up

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Qualcomm Opens Semiconductor Test Manufacturing Site in Shanghai

Qualcomm Incorporated (NASDAQ:QCOM) today announced the opening of Qualcomm Communication Technologies (Shanghai) Co. Ltd., a semiconductor test facility in the Waigaoqiao (WGQ) free-trade zone in Shanghai, and its first foray into providing manufacturing services for semiconductors. By working with Amkor Technology, Inc., one of the world’s leading providers of contract

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Verification, Validation, Testing of ASIC/SOC designs – What are the differences?

If you are involved in any ASIC/SOC design life cycle, it is highly likely that you would have heard questions like – Have you verified a feature?  Is all feature testing completed?  How will you validate a new feature?  What design defects were found and how?
 
The terminologies Verification,

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