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Introduction to Physical Design

Microprocessor in hand

There are numerous steps that are involved in the design of digital (or mixed signal) circuits starting from system specifications right till the chip is manufactured. One of these steps is a process of transforming a functionally described circuit (normally in netlist) into physical layout at the lowest level (normally

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Wire Bonding for High-Reliability RF Device Applications

First introduced by Bell Labs in 1957, wire bonding is an integrated circuit (IC) manufacturing method used in more than 40 billion microelectronic devices each year. Wire bonding is used extensively for interconnecting semiconductor chips to package leads and many other applications that allow RF devices to meet stringent size,

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Introduction to Intel Foundry Services

The man with a carrier of the silicone wafers

This is not the first foray for Intel in the foundry services space. Back in 2013, Intel made its first attempt and started offering production of chips for Altera using the 14nm process. Soon after a couple more companies were announced to have partnered with the Intel Custom Foundry division:

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Semiconductor Sales To Rise at 7.1% CAGR Through 2026

market research

The report forecasts total semiconductor sales will rise 11% this year following a very strong 25% increase in 2021 and an 11% increase in 2020.  If achieved, it would mark the first time since 1993-1995 that the semiconductor market has enjoyed three consecutive years of double-digit growth.  From 2016-2021, the

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ICsense Expands IC Design Activities, Opens Office in Ghent (Belgium)

Leuven (Belgium), February 8th 2022 – ICsense, the Leuven-based IC design house and TDK Group Company, expands its activities to meet the sustained surge in IC demand, among others from European car manufacturers and medical equipment suppliers. Therefore, it now also opens an office in Ghent, a location at the

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The Ultimate Guide: FDSOI

FDSOI stands for Fully Depleted Silicon on Insulator. FDSOI is a planar process technology that provides an alternative solution to overcome some of the limitations of bulk CMOS technology at reduced silicon geometries and smaller nodes.
 
The FDSOI process has two distinct features. First starting with the substrate, an

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