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GlobalFoundries Is Back in the 7nm Game — But This Time It’s Different

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Nov-9th-2026 — GlobalFoundries is preparing to introduce a new generation of semiconductor manufacturing technology that could reshape the competitive landscape for advanced logic, automotive electronics, industrial systems and edge AI. The company’s upcoming FDX Fusion platform aims to deliver performance comparable to conventional 7nm-class technologies while avoiding the expensive EUV lithography equipment commonly associated with leading-edge semiconductor manufacturing.

 

The announcement represents an important change in direction for GlobalFoundries, which discontinued development of its original 7nm FinFET process in 2018. Rather than returning to the same manufacturing approach used by TSMC, Samsung and Intel, GlobalFoundries is pursuing an alternative based on fully depleted silicon-on-insulator (FD-SOI) technology.

 

The company expects to demonstrate FDX Fusion silicon to customers in early 2027, release an initial process design kit (PDK) in mid-2027 and begin initial customer manufacturing in 2028 at its Dresden semiconductor facility in Germany. The longer-term objective is to establish high-volume manufacturing by 2030.

 

GlobalFoundries’ Return to Advanced Semiconductor Technology

In August 2018, GlobalFoundries announced that it would indefinitely suspend its 7nm FinFET development program. The decision reflected the increasing capital expenditure, technological complexity and commercial risks associated with competing at the most advanced semiconductor process nodes.

 

At the time, the company redirected its resources toward differentiated semiconductor technologies, including RF SOI, silicon germanium, embedded memory, power-efficient logic and mature FinFET processes. This strategy allowed GlobalFoundries to focus on applications where semiconductor performance involves more than transistor density alone.

 

Eight years later, the semiconductor market has evolved significantly. The rapid expansion of artificial intelligence, automotive electronics, industrial automation and intelligent connected devices is creating demand for manufacturing technologies that can combine substantial digital processing performance with analog circuitry, high-frequency communications, low power consumption and integrated memory.

 

FDX Fusion is GlobalFoundries’ response to these changing requirements. The company is not simply restarting its previous 7nm program but developing a different type of advanced manufacturing platform intended to address a broader range of semiconductor applications.

 

How FDX Fusion Achieves 7nm-Class Performance

The technological foundation of FDX Fusion is fully depleted silicon-on-insulator, commonly known as FD-SOI. Unlike conventional bulk CMOS manufacturing, FD-SOI uses a thin silicon layer separated from the underlying substrate by an insulating layer, typically buried silicon dioxide.

 

This structure improves electrostatic control over the transistor channel, reduces certain parasitic effects and enables efficient operation at relatively low supply voltages. One important feature of FD-SOI is its ability to adjust transistor characteristics using body biasing, allowing designers to optimize the trade-off between processing performance and power consumption.

 

GlobalFoundries plans to combine advanced FD-SOI transistors with improved substrate engineering, tighter interconnect geometries and optimized standard-cell designs. The new process will continue using planar transistors rather than the FinFET structures used in conventional advanced logic processes.

 

According to technical details disclosed by GlobalFoundries, FDX Fusion targets approximately 14 million logic gates per square millimeter, representing around 2.2 times the digital gate density of the company’s existing 22FDX generation.

 

An important distinction is that FDX Fusion is targeting 7nm-class power and performance, not necessarily the same physical transistor density as a conventional 7nm FinFET process. Its projected logic density is closer to 8nm-class manufacturing technologies.

 

GlobalFoundries believes that the combination of advanced planar transistors, adaptive body biasing and optimized interconnect structures can deliver competitive performance and energy efficiency for applications in which maximum transistor density is not the primary requirement.

 

Manufacturing Advanced Chips Without EUV Lithography

One of the most significant aspects of FDX Fusion is its planned reliance on deep ultraviolet (DUV) lithography rather than extreme ultraviolet (EUV) lithography.

 

EUV lithography has become an important tool for manufacturing advanced semiconductor nodes because its shorter wavelength allows extremely small circuit features to be patterned with fewer exposures in many applications. However, EUV systems require significant capital investment, specialized infrastructure and highly sophisticated manufacturing processes.

 

GlobalFoundries intends to manufacture FDX Fusion using advanced DUV lithography, supported by improvements in patterning techniques, mask precision, materials engineering and process control. Critical layers may require multiple patterning steps to achieve the desired dimensions.

 

Avoiding EUV equipment could offer several economic advantages, particularly for semiconductor companies developing specialized ASICs with lower production volumes than mainstream processors.

 

GlobalFoundries expects its approach to support more competitive mask-set pricing and lower tape-out costs than certain conventional advanced FinFET processes. These potential savings could be especially important for fabless semiconductor companies that must produce multiple product variants or undertake several design revisions before reaching commercial production.

 

Nevertheless, DUV-based manufacturing does not automatically guarantee lower wafer costs. Advanced multi-patterning introduces additional processing steps, alignment requirements and manufacturing complexity. Actual cost competitiveness will depend on equipment utilization, process yield, mask requirements and production scale.

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