September 18, 2016, anysilicon
If you are involved in any ASIC/SOC design life cycle, it is highly likely that you would have heard questions like – Have you verified a feature? Is all feature testing completed? How will you validate a new feature? What design defects were found and how?
The terminologies Verification,
August 03, 2016, anysilicon
This is an interview with Oliver King about understanding your ASIC’s age. As Moortec’s CTO, Oliver has been leading the development of compelling in-chip monitoring solutions to address problems associated with ever-shrinking System-on-Chip (SoC) process geometries. An analogue and mixed signal design engineer with over a decade of experience in lowRead More
August 01, 2016, anysilicon
According to Gartner, the total average IC design cost for a 14nm chip is about $80 million, compared to $30 million for a 28nm planar device. Whilst many vendors will remain at 28nm, the ‘big guys’ have forged ahead with migrating to lower technology nodes. At the leading edge, R&DRead More
July 17, 2016, anysilicon
Students around the world now have free access to the same leading engineering simulation solutions used by top organizations and professional engineers to create the most advanced products on the planet, thanks to ANSYS (NASDAQ: ANSS).
Released today, ANSYS® Student is a free, introductory academic software package for
July 11, 2016, anysilicon
SiFive, the first fabless semiconductor company to build customized, open-source enabled semiconductors, today announced its flagship Freedom family of system on a chip (SoC) platforms. Built around the free and open RISC-V instruction set architecture invented by the company’s founders at the University of California, Berkeley, SiFive’s Freedom U500 andRead More
June 20, 2016, anysilicon
Minimizing the PCB footprint and the BoM cost implies embedding the Power Regulation Network (PRNet) in the SoC.
Meanwhile, minimizing drastically the SoC power consumption involves implementing several modes of activity to turn on and off different functions of the SoC, which generates noise on the supply lines during mode