Staff ASIC Validation Engineer

The Applied R&D (AR) team focuses on targeted research to solve specific problems and enhance multi-disciplinary design, development, and implementation of hardware, software, and systems. The Digital Hardware (DHA) subfamily specializes in the specification, design, and implementation of digital hardware, emphasizing low cost, high yield, and reliability. This role involves independent contributions to ASIC validation and characterization, requiring collaboration with cross-functional teams and expertise in digital hardware design.

Responsibilities:

• Develop ASIC validation and characterization plans as an independent contributor.
• Create validation tests on the ZeBu emulator before ASIC prototypes arrive.
• Update and automate the validation environment where feasible.
• Collaborate with design and verification teams to review test scenarios and provide debugging support.
• Assist in hardware/software bring-up and debugging processes.
• Work with cross-functional teams to troubleshoot product-level issues.

Qualifications:

• Bachelor's degree in Electrical Engineering or Computer Engineering.
• 10 years of experience in verification and lab validation of ASICs.

Skills:

• Proficiency in scripting languages, preferably Python.
• Experience in leading a small technical team.
• Familiarity with traffic generators.
• Knowledge of Ethernet and OTN standards.