SAN JOSE, Calif., Oct. 1, 2025 /PRNewswire/ — GS Microelectronics US, Inc. (GSME), a leading-edge global supplier of integrated circuit design and manufacturing solutions, announced today that it has acquired Muse Semiconductor. Muse Semiconductor is a recognized provider of multi-project wafer (MPW) services, enabling chip designs built on TSMC
Read MoreKuala Lumpur, Malaysia – September 30, 2025 – Key ASIC Berhad (“Key ASIC” or “the Company”), a leader in ASIC design and innovation, has signed a contract worth RM1.11 million with a navigation systems company in the Middle East to jointly develop an AI-driven RF-integrated navigation chip.
The
PORTLAND, October 1, 2025 — Analogue Insight IP Group today announced the opening of Analogue Insight SAFE in Oregon, a new U.S. venture dedicated to developing and licensing high-assurance security IP for next-generation secure Systems-on-Chip (SoCs) and chiplet-based architectures. The new US entity will be led by Rachael J. Parker and David Johnston, expanding
Read MoreWoodcliff Lake, New Jersey — September 30, 2025 — Semiconductor intellectual property (IP) provider CAST today announced the availability of a new SM4 Cipher IP Core, delivering compact, high-performance hardware implementations of the SM4 symmetric block cipher for both ASIC and FPGA designs.
SM4 is the Chinese national standard block cipher
As more companies pursue ASICs to gain product-level differentiation, the ASIC road from concept to chip is paved with unseen challenges.
Many design teams, especially startups or system OEMs new to silicon, encounter the same pitfalls that delay projects, drain budgets, or derail product timelines.
Based on our experience
Sept. 25, 2025 –
SUNNYVALE, Calif. — — Synopsys, Inc. (Nasdaq: SNPS) announced today its ongoing close collaboration with TSMC to deliver multi-die solutions, encompassing advanced EDA and IP products, that support TSMC’s leading-edge processes and packaging technologies, driving innovation in AI chip and multi-die design. The 3DIC Compiler exploration-to-signoff platform and IP, tuned for