How to Optimize IC Test Time

Optimizing ASIC test time is a critical factor in semiconductor manufacturing to enhance efficiency, reduce costs and improve time to market. In this article we will provide strategies you can use and implement in your design to help reduce IC test time. One can consider the following benefits:

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How to Get the Most Out of Fusion Compiler

The field of chip design is constantly evolving, and Electronic Design Automation (EDA) tools have become indispensable for designing complex integrated circuits. These tools offer a wide range of functionalities to streamline the design process, optimize performance, and ensure manufacturability. However, using EDA tools efficiently requires a solid understanding of

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Tenstorrent Raises $100 Million in Funding Led by Hyundai and Samsung for AI Chip Development

Tenstorrent, a promising artificial intelligence (AI) chip startup, has recently secured $100 million in funding through a successful financing round led by industry giants Hyundai and Samsung. The substantial investment reflects the growing interest and demand for cutting-edge semiconductor technologies that can fuel advancements in AI and 5G technologies. This

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GF Micro Partners with AnySilicon

press release

AnySilicon, the leading marketplace for ASIC service providers, announced today that GF Micro, an independent silicon design company for over thirty years, has partnered with AnySilicon to promote its ASIC development services. As part of the AnySilicon platform, GF Micro will gain access to a full range of online marketing

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CEO Talk: Sanghyun Kim, CEO, Chips&Media, Inc.

We had a great pleasure interviewing Sanghyun Kim, CEO of Chips&Media, Inc.

Tell me a bit about your background. How did you first get started with Chips&Media?
After graduating from the university and graduate school in the United States, I started as an engineer at a

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Cadence to Acquire Rambus PHY IP Assets

SAN JOSE, Calif.– July 20, 2023 — Cadence Design Systems, Inc. (Nasdaq: CDNS) and Rambus Inc. (Nasdaq: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced that they have entered into a definitive agreement for Cadence to acquire the Rambus SerDes and memory interface PHY

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