Category Archives: ASIC Design

ELECTRA IC Marks a Decade of Design and Verification Excellence at CES 2024

Istanbul, 18.Dec.2023 – Istanbul-based ELECTRA IC, a distinguished leader in design and verification solutions, proudly announces its milestone achievement of ten years in the industry. To commemorate this significant anniversary, ELECTRA IC will be showcasing its latest achievements at CES (Consumer Electronics Show) 2024 in Las Vegas, reaffirming its commitment

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What’s the job of a Physical Design Engineer?

Physical design engineer is a specialized function within chip design that encompasses the intricate process of transforming the abstract hardware logic initially delineated in a high-level Hardware Description Language (HDL) into a tangible configuration of physical logic gates and interconnecting wires. This tangible representation serves as the blueprint for the

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Green Mountain Semiconductor Participates in Unveiling of Innovative AI processor

press release

BURLINGTON, VT–Green Mountain Semiconductor, a design house involved in AI-related circuit design initiatives since 2014 and specializing in Custom Analog, Digital, and Mixed Signal Design with a focus on Memory (DRAM, SRAM, and Emerging NVM), has achieved a groundbreaking milestone on behalf of their client by unveiling an innovative ASIC

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Green Mountain Semiconductor Inc. awarded a contract from NASA to Pave the Way for Space-Ready Neural Processors

press release

BURLINGTON, VT–Green Mountain Semiconductor Inc. (GMS), a custom circuit design provider, is proud to announce its recent achievement of a Phase I Small Business Innovation Research (SBIR) contract. This significant milestone underscores GMS’ commitment to pushing the boundaries of technology in support of space applications. The contract was granted under

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Sondrel is one of the founding members of Arm Total Design

press release

Reading, UK – 17 October 2023. Sondrel (AIM: SND), is pleased to announce that it is one of the founding members of Arm® Total Design, an ecosystem that is committed to bringing Arm Neoverse™ CSS-based designs to market. Arm Neoverse CSS features high-end Arm Neoverse cores that are designed for

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The Ultimate Signoff (TapeOut) Checklist

In semiconductor design, “sign-off” during the tape-out (tapeout) of a chip refers to the formal approval process to ensure that the chip design is error-free, meets all specifications, and is ready for manufacturing at the foundry. It is essential because it minimizes the risk of costly errors, ensures compliance with

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