Category Archives: IP Cores

Espressif Licenses CEVA IP Core in IoT Chip

EVA, Inc. (NASDAQ: CEVA), the leading licensor of signal processing IP cores for smarter, connected devices, today announced Espressif Systems, a leading fabless semiconductor company providing low power wireless solutions for the Internet of Things (IoT) applications has licensed and deployed the RivieraWaves Bluetooth dual mode technology in its new ESP32 chip.
 
Espressif

What is RISC-V? Why do we care and why you should too!

I’d like to start by talking about the biggest misconception regarding RISC-V. Many of you who have heard about RISC-V likely believe it is an open-source processor … but it is not.
 
So what is it?
RISC-V is an open specification of an Instruction Set Architecture (ISA). That is,

Hisense selects their SoC Fabric IP for IoT from Dolphin Integration

Launching any SoC on a highly competitive market demands a differentiation for which Hisense was searching for an ultra low-power solution to extend battery life-time of wireless-connected devices. Designing such an integrated circuit introduces new challenges: silicon area, power consumption and BoM cost must be aggressively reduced, while dealing with

CSEM licenses IcyTRX™ Bluetooth Low Energy silicon RF IP to Oticon

Neuchatel, 11 October 2016 – CSEM, the Swiss Research and Technology Organization, today announced that they have licensed their IcyTRX™ silicon RF IP core to Danish hearing aid manufacturer Oticon.
 
Oticon has integrated IcyTRX™ IP core into their new chipset for the new Oticon Opn™ range of advanced wireless-enabled

Ridgetop Group and BaySand Partner to Expand Mixed-Signal IP Portfolio

Ridgetop Group, Inc. and Silicon Valley-based BaySand Inc., the leader in application configurable application specific integrated circuits (ASICs), today announced they will work cooperatively to develop a series of new applications to increase their existing mixed-signal intellectual property core (IP) portfolios.
 
Through a wide-ranging partnership, they also will offer

Sidense Demonstrates Successful 1T-OTP IP Core Operation in TSMC 16nm FinFET Process

Sidense Corp., a leading developer of Non-Volatile Memory (NVM) One-Time Programmable (OTP) IP cores, today announced that it has demonstrated successful operation of its patented SHF 1T-OTP memory IP macros at TSMC’s 16FF+ and 16FFC process nodes.

Parametric measurements for both 16FF+ and 16FFC silicon were made during programming