Category Archives: Packaging

TSMC will enter the fan out wafer level package business

“The fact that TSMC is interested in advanced packaging isn’t “new news”, comments Jean-Christophe Eloy, President & CEO, Yole Développement (Yole). He adds: “Over the last few years TSMC has significantly invested in flip-chip copper pillar capacities (Source: 2015 Flip Chip Business Update report, October 2015) and 3DIC stacking for

STATS ChipPAC Sold to China’s JCET

According to the latest reports, Temasek and China’s Jiangsu Changjiang Electronics Technology Co Ltd (JCET) just signed a $1.8 million deal that will allow JCET to acquire STATS ChipPAC from Temasek.
 
 

 
The decision followed the new internal financial policy at Temsasek which aims to diversify the

ASE purchase 5% of rival SPIL

Mergers and acquisitions happen very frequently in the semiconductor industry. However, what it is not common that these kind of operations proceed smoothly, quickly and without hurdles. This is the case of the public takeover of Siliconware Precision Industries (SPIL) for Advanced Semiconductor Engineering Inc (ASE). Indeed, the company dealing

Comparing Au, Pt, Ag and Cu Wire Bonding

With the creeping rise in the price of gold, many microelectronics manufacturing companies have been looking for alternatives to reduce the cost of ball bonding. Recently, the trend has been to look into the use copper wire. However, there are many drawbacks to using copper wire, including the short shelf

Stack Die (3D IC) Assembly – Drivers and Challenges

With the increased demand for improved functionality and miniaturization in portable hand-held devices—such as cell phones, PDA, digital cameras and laptop computers—original equipment manufacturers (OEMs) and integrated device manufactures (IDMs) have joined forces to ensure enhanced chip performance without sacrificing valuable board real estate. Rather than use conventional single chip

WLP Manufacturing Capacities, Growth and Forecast

“The semiconductor industry is facing a new era in which device scaling and cost reduction will not continue on the path they followed for the past few decades, with Moore’s law in its foundation”, asserts Andrej Ivankovic, Technology & Market Analyst, in the Advanced Packaging and Semiconductor Manufacturing team, at Yole Développement