Hey FPGA guy,
I can see where you are coming from. Making the 1st ASIC could be an expensive process that requires design & tools. But the 2nd, 3rd etc ASICs in the production will always be cheaper than an FPGA.
This means that for every high volume (and sometimes even low volume) ASIC project will have a good ROI compared to an ASIC.
I can count several reasons for explaining why ASIC NRE cost is so extensive:
1. design, verification and layout hours spent
2. IP core cost
3. Tools: maskset, package, test solutions
Anything I missed?
BR, Ezra