Advanced ASIC FPGA Engineer

General Dynamics Mission Systems is seeking an experienced ASIC/FPGA Design Engineer to lead digital design efforts using VHDL, transitioning designs from FPGA to ASIC. This role involves mentoring a small team and requires a strong background in digital design and hardware integration.

Responsibilities:

• Lead digital design efforts using VHDL on FPGA platforms and transition to ASIC implementation.
• Define, design, verify, and document ASIC/FPGA developments.
• Determine architecture and detailed design approach with a focus on VHDL-based digital design.
• Create test and simulation plans to establish functional criteria and verify test results.
• Evaluate process flow including design, synthesis, and timing analysis.
• Collaborate with the ASIC packaging team for FPGA-to-ASIC conversion.
• Mentor engineers through the conversion process and best practices.
• Support program execution with awareness of project scope, schedule, and cost objectives.

Qualifications:

• Bachelor's degree in Electrical or Computer Engineering, or related field with 5+ years of experience; or a Master's degree with 3+ years of experience.
• Ability to obtain a DoD Security Clearance within 18 months.
• U.S. citizenship is required.

Skills:

• Proficient in VHDL for digital design and simulation.
• Hands-on experience with Microsemi and/or Xilinx FPGA platforms.
• Proficient with Vivado, Libero, Mentor, and/or Cadence EDA tools.
• Experience with hardware integration using lab tools (oscilloscopes, logic analyzers, JTAG debuggers).
• Ability to mentor others through complex technical processes.
• Strong written and verbal communication skills.