ASIC FPGA Engineer

General Dynamics Mission Systems (GDMS) is seeking a skilled engineer to join our team, focusing on ASIC and FPGA development. The ideal candidate will have a strong background in Electrical or Computer Engineering, with a commitment to innovation and excellence in defense technology solutions.

Responsibilities:

• Define, design, verify, and document ASIC and/or FPGA developments.
• Determine architecture, system simulation, and detailed design approach.
• Define module interfaces and all aspects of device design and simulation.
• Evaluate process flow including high-level design, synthesis, place and route, timing, and power utilization.
• Create test and simulation plans that establish functional criteria.
• Verify test results and analyze performance.
• Review vendor capabilities, foundry technologies, device libraries, and simulation tools.

Qualifications:

• Bachelor's degree in Electrical or Computer Engineering, or related field plus 2 years of relevant experience; or Master's degree plus 6 months of relevant experience.
• Ability to obtain a DoD Security Clearance within 18 months.

Skills:

• Strong proficiency in VHDL for digital design and simulation.
• Hands-on experience with Microsemi and/or Xilinx FPGA development.
• Proficiency with Vivado, Libero, Mentor, and/or Cadence EDA tools.
• Hardware integration experience with lab tools (oscilloscopes, logic analyzers, JTAG debuggers).
• Ability to mentor others through technical processes.
• Solid understanding of ASIC/FPGA engineering processes and design tools.
• Strong written and verbal communication skills.