ASIC Research Engineer- Front-End Digital Design

The USC Information Sciences Institute (ISI) is seeking an ASIC Research Engineer specializing in Front-end Digital Design to join its CS&T Division in Arlington, VA. This role involves designing and verifying advanced ASIC prototypes for critical national applications, collaborating with a dynamic team, and engaging with leading research sponsors.

Responsibilities:

• Design and verify register-transfer level (RTL) models of CPUs, memories, and accelerators.
• Collaborate with ISI’s MOSIS 2.0 service and integrate third-party IP cores.
• Work on projects related to communications, signal processing, and security.
• Engage in a fast-paced research environment to contribute to national importance problems.

Qualifications:

• U.S. Citizenship or Permanent Residency to handle Controlled Unclassified Information (CUI).
• Bachelor’s degree in Computer Engineering, Electrical Engineering, or related field with over 3 years of experience, or a Master’s degree.
• Proven experience in creating digital designs using Verilog, System Verilog, or VHDL RTL.
• Solid understanding of computer architecture and microarchitecture.

Skills:

• Experience with EDA tools, scripting, and revision control.
• Familiarity with logic synthesis and timing tools.
• Knowledge of digital design verification and performance modeling.
• Experience with agile hardware design methodologies and AI-assisted workflows.
• Proficiency in using FPGAs and Linux.