Published Date: January 15, 2026
Intel, Phoenix, AZ•Hybrid work
Job Description:
Intel Foundry Services is seeking an Aerospace, Defense & Government (ADG) Memory Design Application Engineer to provide specialized technical support for memory compiler generation and integration. This role is pivotal in ensuring successful customer tape-outs by addressing complex memory IP integration challenges and enhancing memory design methodologies for advanced semiconductor applications.
Responsibilities:
- Provide comprehensive technical support on memory compiler generation and integration issues.
- Collaborate with internal teams and external stakeholders to resolve foundational IP integration issues.
- Drive resolution of customer issues related to memory IP collaterals for optimal performance.
- Create application notes and documentation, and deliver technical training presentations.
- Enhance quality of design kits and memory IP collaterals to facilitate successful customer design tape-outs.
- Develop best practice guidelines for memory integration across advanced process technologies.
- Lead debugging and problem-solving activities in collaborative environments.
- Provide technical expertise on memory compiler design and optimization.
- Support customers through complex memory design challenges and advanced integration requirements.
- Deliver customer-facing technical support focused on memory design and integration solutions.
Qualifications:
- US Citizenship required
- Ability to obtain a US Government Security Clearance
- Bachelor's degree in Electrical Engineering, Computer Science, or a related STEM field
- 3+ years of experience in Memory design or Memory Compiler development and implementation
Skills:
- Active US Government Security Clearance (minimum Secret level preferred)
- Post Graduate degree in Electrical Engineering, Computer Science, or a related STEM field
- Proficient in common memory types (SRAM, Register Files, ROM) and CMOS digital circuit design principles
- Knowledgeable in behavioral and physical modeling of memory architectures
- Hands-on experience in Memory Design, Memory Compiler Design, eFUSE, antiFUSE, and MBIST
- Experience with IP development
- Proficient in scripting languages (Perl/Tcl/Python) and power-aware RTL and UPF flow
- Experience in ASIC or SoC development