Sr Data Converter IC Design Engineer [FinFET]

We are looking for a Senior/Lead Data Converter IC Design Engineer with expertise in Analog/Mixed-Signal design to join our team in San Jose or San Diego. This role involves architecting and tape-out of high-speed data converters in advanced FinFET nodes, contributing to next-generation HPC, AI, and communications hardware.

Responsibilities:

• Architect and design multi-GS/s ADC/DAC architectures including Time-Interleaved SAR, Pipeline, Flash, or RF-DACs.
• Deliver transistor-level circuits such as track-and-hold, comparators, low-jitter clock paths, and bias networks in 7nm–3nm FinFET processes.
• Implement digital calibration techniques for offset, gain, timing skew, and linearity.
• Supervise layout to address layout-dependent effects, parasitics, electromigration, and self-heating.
• Lead post-silicon lab bring-up, bench testing, and model-to-hardware correlation.

Qualifications:

• M.S. or Ph.D. in Electrical Engineering or a related field.
• 10 years of hands-on experience in high-speed data converter design and successful silicon tape-outs.
• Proven track record in FinFET technology at advanced nodes (3nm, 5nm, or 7nm).

Skills:

• Strong command of FinFET-specific design constraints such as fin quantization, degraded gm/gds, and 3D RC extraction.
• Proficiency in EDA tools including Cadence Virtuoso, Spectre/PrimeSim, and Calibre PEX/Quantus.