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This post describes the growth of top 10 semiconductors companies in the last 10 years. It tracks the growth of the 10 semiconductor leaders from 2002 to 2011 and shares some nontraditional thoughts about the ten semiconductors vendors’ success:
Thought #1: Follow the market trends
Since the 80’s companies from USA,
We love copper (Cu) wire. In fact, we already described in our post “Copper Wire (Cu) Reduces Package Cost” the cost advantages of copper wire bonding compared to Gold (Au) wire. Copper wire introduced some challenges to assembly houses (such as ASE, Amkor, STATS ChipPAC) but also offers a few
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Do you know someone that is not eager to reduce their ASIC production costs? I don’t. Some say that redesign changes can lead to significant cost reduction, for instance – using a more advanced silicon technology node to shrink the die size. True, but this is a really big, painful
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Silicon wafers are the most essential element in the realization of ICs. The semiconductor industry had invested heavily to increase the wafer size during the last 30 years, so while foundries used to produce 1 inch wafers, today’s common wafer size is 300mm (11.8 times larger than 1 inch). There
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Very often IC package design requires designing a BGA substrate. Substrate design and layout is very similar to any other PCB design. The difference is that the substrate size is much smaller than most of the PCBs you have seen. In this post we do something a bit unusual and
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Pure-play foundries are offering vanilla flavor services, meaning one can buy only wafers. ASIC design, testing, packaging and supply chain services are not part of their service offering.
Large IDM players, who manage their own supply chain, seek this type of engagement because they prefer to own the supply
Tapeout is a major milestone in every ASIC project lifecycle. It means the design phase is completed and you are ready to send out the GDSII to the fab for production.
The term “tapeout” was coined in 70’s. Historically, engineered used a magnetic tape to store all the ASIC design
Update (August 2012): Our internal analysis shows GLOBALFOUNDRIES to become the second largest foundry worldwide and managed to break the 4B$ barrier. See below updated charts.
Foundry business is doing well, the semiconductor market is growing and there is a continues need for silicon component supply.
While we are aware of
MSL stands for Moisture Sensitivity Level. It represent the amount of time an IC can be exposed to ambient conditions and still be assembled on a PCB without being damaged.
When the antistatic bag is opened and the ICs are exposed to ambient conditions, the moisture in the air
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LoadBoard (LB) is a mandatory, custom made PCB, that acts as a mechanical and electrical interface between the tester (ATE) and the device under test (DUT). LoadBoard has well-defined physical dimensions and it must fit perfectly into the tester.
It is one piece of the entire ASIC Test Solution