Get Listed
Get a FREE Quote for your Next ASIC Project
Find ASIC Vendors
Browse Semiconductor Services
ASIC Design
IC Layout
ASIC Verification
Semiconductor Foundries
IC Packaging
IC Testing
IC Supply Chain
IC Qualification
IC Failure Analysis
Browse IP Vendors
IOs and Library IP
ESD
GPIO
Standard Cell
Memories and PHY IP
Antifuse
CAM
DDR
EEPROM
eFuse
Flash Controller
NAND Flash
OTP
RAM
ROM
SD
SDRAM Controller
SRAM Controller
CPU and Peripherals IP
Clock Generator
CPU
DMA Controller
DSP
Interrupt Controller
IO Controller
LCD Controller
NoC
Peripheral Controller
Receiver/Transmitter
Security
Timer/Watchdog
Analog and Mixed Signal IP
ADC
AFE
Amplifier
Clock Synthesizer
CODEC
DAC
DC/DC
DLL
Oscillator
PLL
Power Management
RF Modules
Temperature Sensor
Voltage Reference
Voltage Regulator
I/F Controller and PHY IP
AMBA
FireWire
HDMI
I2C
Interlaken
JESD204B
MIPI
PCI
SATA
USB
V-by-One
Wireline Communication IP
Datacom
Error Correction
Ethernet
HDLC
MODEM
Optical
Telecom
Wireless Communication IP
802.11
802.16
Bluetooth
CDMA
GPS
LTE
NFC
Other
Verification IP
AMBA
Memory
MIPI
PCIe
USB
Multimedia IP
Audio Decoders
Audio Encoders
Audio Other
Video Decoders
Video Encoders
Video Other
Get 3 Price Quotes From
ASIC Design Companies
IP Core Vendors
Semiconductor Foundries
IC Packaging
IC Testing Companies
IC Qualification Companies
IC Failure Analysis Labs
FPGA Design Companies
Tools
ASIC Price Calculator
IC Package Price Estimator
Die Per Wafer Calculator
Semipedia
Ask a Question
Home
ASIC Design
ASIC Verification
Foundries
IC Packaging
IC Testing
Turnkey
IC Qualification
Failure Analysis
ASIC Blog
449 Views
Lithography
March 20, 2019, anysilicon
The process of making wafers, from a mask.
Recent Stories
CEO Talk: Martin Sallenhag, RoodMicrotec
Faraday’s AIoT Platform ASIC Solution Escalates System Accomplishment
The Future Of Embedded Monitoring Part 1
Five Semiconductor Companies Hold 53% of Global Wafer Capacity
EnSilica to Develop Next-Generation Ka Band Satellite Transceivers for the European Space Agency
Low-Latency Ethernet MAC IP Core from CAST now ASIL-D Certified
Presto Engineering Acquires DELTA Microelectronics Business from FORCE Technology
Semiconductor R&D To Nudge Higher Through 2024
Find Vendors
IP Cores
Find ASIC Vendors
Keywords
Category
All
ASIC Design
IC Layout
ASIC Verification
Foundries
IC Packaging
IC Testing
Turnkey
IC Qualification
Failure Analysis
Find IP Vendors
Keywords
Category
All
IOs and Library IP
Memories and PHY IP
CPU and Peripherals IP
Analog and Mixed Signal IP
I/F Controller and PHY IP
Wireline Communication IP
Wireless Communication IP
Verification IP
Multimedia IP
Multimedia IP
Get Price Offers From
ASIC Design Houses
Wafer Foundries
Chip Packaging
IC Testing
IP Core Vendors
FPGA Design
Welcome New Vendors
iSine
FortifyIQ
TSI Semiconductors
Brite Semiconductor
Agile Analog
Answer a Question
Wafer Price
FIB operation
What is Clock Domain Crossing in ASIC design?
“hard bumps” vs "soft bumps"
Small than WLcsp
Recent Semipedia Items
IDM
BGA substrate Design
BIST
MLM – Multi Layer Mask
ATPG
Recent Posts
CEO Talk: Martin Sallenhag, RoodMicrotec
Faraday’s AIoT Platform ASIC Solution Escalates System Accomplishment
The Future Of Embedded Monitoring Part 1
Five Semiconductor Companies Hold 53% of Global Wafer Capacity
EnSilica to Develop Next-Generation Ka Band Satellite Transceivers for the European Space Agency
Most Popular Blog Posts
Top 15 Semiconductor Sales Leaders – 2019
The Ultimate Guide to Lead Frame
IC’Alps joins Arm Approved Design Partner program to better support customers with ASIC development
CEO Talk: Jean-Luc TRIOULEYRE of IC’Alps
Is Fan-Out packaging still popular?
Tools
ASIC Price Calculator
IC Packages Price Calculator
Die Per Wafer Calculator
We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we'll assume that you are happy to receive all cookies from this website.
Okay, thanks
