WLP Manufacturing Capacities, Growth and Forecast

“The semiconductor industry is facing a new era in which device scaling and cost reduction will not continue on the path they followed for the past few decades, with Moore’s law in its foundation”, asserts Andrej Ivankovic, Technology & Market Analyst, in the Advanced Packaging and Semiconductor Manufacturing team, at Yole Développement (Yole). Under this context, the semiconductor industry seeks further performance and functionality boosts in package level integration. Emerging packages such as fan-out wafer level packages, 2.5D/3D IC and related System-in- Package (SiP) solutions together with more conventional but upgraded flip chip BGAs aim to bridge the gap and revive the cost/performance curve. In such an environment, what is the importance of fan-in wafer level packages, the current status of the fan-in WLP industry and how will fan-in WLP market and technology evolve?

The “More than Moore” market research and strategy consulting company, Yole confirms its leadership in the advanced packaging industry with its new technology & market report entitled Fan-in Wafer Level Packaging: Market & Technology Trends report. With this new analysis, the consulting company covers a broad part of the existing and emerging advanced packaging technologies and related platforms: indeed Yole’s collection includes Fan-Out and Embedded Die: Technologies & Market Trends (Feb. 2015), Equipment & Materials for 3DIC & Wafer-Level Packaging Applications (Nov. 2014) and 3DIC & 2.5D TSV Interconnect for Advanced Packaging 2014 Business Update (Oct. 2014)

Fan-in Wafer Level Packaging: Market & Technology Trends report provides a market overview of the fan-in Wafer Level Packaging (WLP) landscape including emerging and declining applications, forecasts until 2020, supply chain analysis and main players.

Although present for more than a decade, fan-in WLP are still on an evolutionary track increasing production and attracting new applications. Current market data indicate fan-in WLP manufacturing capacities are full and more volume is required in both 200mm and 300mm wafer sizes.

Furthermore, the “Internet of Things” (IoT) promises a wide range of new applications for which fan-in WLP would be an ideal match presenting an interesting opportunity to increase the demand further.

The following chart shows the wafer level packaging forecast:

How will the current capacities be increased, who will take lead in investments and what is the actual range of investments needed? Currently, majority of production is still done on 200mm wafers with 300mm wafer production projected to increase. An in depth analysis addressing these questions is done in Yole’s report, including competition analysis of business models (OSAT, IDM, WLP house, foundry), their market shares and prediction of future investment.

As illustrated in Yole’s non-exhaustive map of fan-in WLP manufacturers, there are many players currently active on the market: Maxim, FlipChip, Freescale for example in the US area – ipdia, NXP, nanium, STMicroelectronics, Robert Bosch … in Europe – And OKI, Fujitsu, nepes, Fujikura … in Asia.

The following diagrap shows a map of wafer level packaging companies worldwide:

The supply chain continues to develop with new companies entering this market and new business models being established. The competitive landscape is expected to increase as well as collaborations and partnerships. The specialized wafer level packaging model, focused on fan-in and fan-out packages is emerging strong and competing with traditional OSAT leaders. Some new players are rising quickly, foundry involvement is no longer a small dent and new players from China are increasing activity on the market, bringing in a new type of competition with a strong support in capital and acquisition capabilities.

“In total, over 70 fabless and IDM companies implementing their design in fan-in WLP were identified, along with over 20 fan-in WLP manufacturing companies”, details Santoh Kumar, Senior Technology & Market research analyst, Advanced Packaging and Semiconductor Manufacturing at Yole.

The following drawing shows wafer level packaging technology roadmap:

All details are included in Yole’s report including competitive analysis of these players. More info. on www.i-micronews.com, advanced packaging reports section.

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This is a guest post by Yole Développement that provides marketing, technology and strategy consulting.