Digital Integrated Circuit Design Verification Engineer

Snap Inc. is a technology company focused on enhancing communication through innovative products like Snapchat, Lens Studio, and Spectacles. The company is seeking a Design Verification Engineer to join its Spectacles Team, which is dedicated to advancing augmented reality technology and creating immersive experiences.

Responsibilities:

• Collaborate with a multi-disciplinary team to design display Integrated Circuits for AR.
• Work closely with digital design, analog logic, software, and verification engineers.
• Develop and implement UVM-based and assertion-based testbenches.
• Create and execute verification test plans, including functional and code coverage.
• Utilize Siemens Questa tool set for verification and debugging tasks.
• Specify and configure tools and create automation.

Qualifications:

• BSEE or MSEE or equivalent experience.
• 10+ years of experience in ASIC Design Verification.

Skills:

• Strong knowledge of UVM and SystemVerilog for advanced verification methodologies.
• Proficient in digital functional simulation and tools like Siemens Questa.
• Good Verilog RTL coding practices.
• Scripting and automation skills in TCL, Make, Perl, Python, and Shell scripts in a Linux environment.
• Excellent written and verbal communication skills in English.