Principal Design Engineer, ASIC

Micron Technology is seeking a skilled professional to lead the architecture for next-generation chiplet-based ASIC prototypes, focusing on memory and storage solutions. This role is pivotal in shaping the future of AI and data-driven products by optimizing performance, power efficiency, and reliability across various teams.

Responsibilities:

• Define chiplet-based ASIC/SoC architectures for memory and storage controllers.
• Model data paths, control logic, cache design, and high-speed IO interfaces.
• Collaborate with firmware, system, and packaging teams for end-to-end optimization.
• Conduct PPA analysis through modeling and simulation.
• Specify and evaluate IP blocks including ECC, DMA, memory interfaces, and die-to-die links.

Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 10+ years in ASIC/SoC architecture, ideally in memory, storage, or interconnect technologies.
• Strong understanding of DRAM, NAND, and controller architectures.
• Experience with high-speed interfaces such as UCIe, HBM, DDR/LPDDR, PCIe, NVMe, and ONFI.

Skills:

• Proficiency in RTL design (Verilog) and hardware modeling tools.
• Performance modeling or HW/SW co-design experience.
• Experience with ECC design and chiplet architectures (preferred).
• Knowledge of HBM integration and exposure to AI/ML workloads or data center/automotive memory systems (preferred).
• Strong communication and leadership skills.
• Programming skills in C++ and Python.