Senior ASIC Design Engineer

Tektronix is seeking a Senior Analog/Mixed-Signal ASIC Designer to lead the design and development of advanced RF integrated circuits in Louisville, Colorado, or Beaverton, Oregon. This role involves collaboration with a team of engineers to deliver innovative solutions using cutting-edge design tools and methodologies.

Responsibilities:

• Architect, design, and manage complex analog and mixed-signal blocks.
• Develop and implement sensitive layouts; contribute to layout floor planning and optimization.
• Conduct detailed simulations to validate and optimize circuit performance, yield, and manufacturability.
• Perform signal integrity and system-level analysis for interfaces external to the ASIC.
• Create and execute comprehensive characterization plans; analyze and interpret lab data to validate designs.
• Collaborate with product line architects to evaluate system-level trade-offs in power, cost, and performance.
• Lead and participate in design reviews to ensure technical rigor and design integrity.
• Coordinate with Program and Functional Managers to maintain project schedules and ensure cross-functional alignment.
• Drive continuous improvement in ASIC design processes, tools, and team communication.

Qualifications:

• MSEE or PhD in Electrical Engineering, or equivalent experience.
• Minimum of 5 years of hands-on experience in analog and/or mixed-signal IC design.
• Proficiency with modern ASIC design tools (e.g., Cadence, Spectre, Virtuoso, etc.).
• Demonstrated expertise in layout design for critical analog/mixed-signal cells.
• Proven ability to characterize and debug silicon in a lab environment.
• Strong verbal and written communication skills, including the ability to produce high-quality technical documentation.
• Experience collaborating with geographically distributed teams.
• U.S. citizenship or permanent residency is required.

Skills:

• 10+ years of experience in analog/mixed-signal IC design (preferred).
• Deep expertise in the design of amplifiers, samplers, PLLs, ADCs, and DACs (preferred).
• Proficiency in ADC and DAC architecture and implementation (preferred).
• Experience designing PLLs, DLLs, and clock distribution networks (preferred).
• Passion for staying current with semiconductor process technologies and a commitment to continuous learning (preferred).
• Ability to influence architectural and system-level design decisions (preferred).