ASIC FPGA Engineer – Entry Level

General Dynamics Mission Systems (GDMS) is seeking a qualified candidate for a position focused on FPGA (Field Programmable Gate Array) development. The role involves defining, designing, verifying, and documenting FPGA projects, requiring a Bachelor's degree in Electrical or Computer Engineering or a related field. Candidates must be U.S. citizens and able to obtain a Department of Defense Secret security clearance.

Responsibilities:

• Define, design, verify, and document FPGA developments.
• Determine architecture, system simulation, and detailed design approach.
• Define module interfaces and all aspects of device design and simulation.
• Evaluate process flow including high-level design, synthesis, place and route, timing, and power utilization.
• Create test and simulation plans that establish functional criteria.
• Verify test results and analyze performance.
• Review vendor capabilities, foundry technologies, device libraries, and simulation tools.

Qualifications:

• Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field.
• Ability to obtain a Department of Defense Secret security clearance.
• U.S. citizenship required.

Skills:

• Working knowledge of FPGA development processes.
• Ability to grasp and apply new information quickly.
• Experience handling complex assignments.
• Initiative in executing projects with minimal direction.
• Good written and verbal communication skills.
• Ability to report on ASIC/FPGA design topics clearly.
• Proficiency in Microsoft Office applications.
• Identifying opportunities for AI application in continuous improvement.