Senior ASIC Power Delivery Engineer

Join Google's AI and Infrastructure team as a Senior Power Design Engineer, where you'll shape the future of AI/ML hardware acceleration by driving the development of Tensor Processing Unit (TPU) technology. This role involves collaborating with cross-functional teams to optimize power delivery networks and ensure the integrity of advanced technology nodes, contributing to groundbreaking innovations that empower millions of users worldwide.

Responsibilities:

• Drive early process and metal stack analysis to influence power architecture.
• Deliver power grid designs for all power domains, ensuring they meet power density and integration requirements.
• Optimize through-silicon via and power grid co-design on 3D stacked dies, focusing on design rule check cleanliness and electromigration.
• Collaborate with various design teams to co-optimize designs and accommodate top-level routes.
• Stabilize and finalize power grid designs in alignment with project milestones.

Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 8 years of technical experience in physical design disciplines involving power delivery and advanced process technology nodes.
• Experience with power grid integrity, including budgeting, analysis, verification, and signoff.
• Familiarity with place and route tools, electromigration and IR drop tools, and design rule check tools.

Skills:

• Master's degree or PhD in a relevant field with an emphasis on computer architecture (preferred).
• Experience in owning power grid design and collaborating with architecture owners.
• Knowledge of voltage budgets and drop mitigation for new projects.
• Familiarity with low power design techniques such as unified power format and dynamic voltage frequency scaling.