Published Date: September 02, 2026
Positron AI, Austin, TX 78701•Hybrid work
Job Description:
Positron AI is a leading company focused on developing custom hardware systems to enhance AI inference capabilities, offering superior performance and efficiency compared to traditional GPU systems. We are seeking an ASIC Design Verification Engineer to ensure the functional correctness and performance of our AI inference ASICs, contributing to the advancement of AI hardware technology.
Responsibilities:
- Develop and execute verification strategies for AI inference ASICs.
- Define and implement comprehensive test plans and verification methodologies.
- Lead the development of verification environments using SystemVerilog UVM.
- Create and maintain simulation testbenches, directed and constrained-random tests.
- Collaborate with design and architecture teams to ensure functional coverage and closure.
- Drive debugging and root cause analysis of design issues in pre-silicon and post-silicon validation.
- Work with FPGA and emulation teams for early hardware validation.
- Manage verification schedules, deliverables, and risk mitigation plans.
Qualifications:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of experience in ASIC verification.
- Expertise in SystemVerilog UVM and simulation tools.
- Strong knowledge of verification planning, testbench development, and coverage-driven verification.
- Experience with industry-standard EDA tools (Cadence, Synopsys, Mentor Graphics).
- Hands-on experience with debugging tools, waveform analysis, and scripting (Python, Perl, or TCL).
- Familiarity with AI/ML accelerators, memory subsystems, and high-speed interconnects.
- Proven track record of successfully verifying complex ASIC designs.
Skills:
- Advanced degree in Electrical or Computer Engineering or related field.
- Experience with hardware-software co-verification.
- Knowledge of formal verification techniques.
- Understanding of post-silicon validation and bring-up methodologies.