Principal / Senior Principal FPGA/ASIC Verification Engineer

Northrop Grumman is seeking Digital Verification Engineers to join their Mission Systems Sector, focusing on the development of full-custom digital and mixed signal circuits. This role offers opportunities to work on groundbreaking technologies that impact global security and innovation.

Responsibilities:

• Develop full-custom digital and mixed signal circuits.
• Utilize HDL (VHDL/Verilog) and HVL (SystemVerilog) for design verification.
• Implement SystemVerilog Assertions (SVA) and Universal Verification Methodology (UVM).
• Engage in coverage-driven verification methodology from planning through closure.
• Collaborate with a team of scientists and engineers to advance computing technologies.

Qualifications:

• Bachelor's degree in a technical area (BSEE or related engineering discipline) for Principal level; 8 years of relevant experience for Senior Principal level.
• Proficiency in HDL (VHDL/Verilog) and HVL (SystemVerilog).
• Experience with FPGA or ASIC design.
• Knowledge of Universal Verification Methodology (UVM).
• Familiarity with scripting languages (Bash, Perl, Python, Tcl).
• Experience with Linux OS and coverage-driven verification methodologies.
• Must be a US Citizen with the ability to obtain a Top Secret/SCI security clearance with Polygraph.

Skills:

• Strong written and oral communication skills.
• Experience with object-oriented programming languages and concepts.
• Ability to work collaboratively in a team environment.