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ASIC Engineer, Design Verification

Published Date: January 07, 2026
Meta, 1 Hacker Way, Menlo Park, CA 94025
Job Description:

Meta is seeking an experienced ASIC Design Verification Engineer to join its Infrastructure organization, focusing on developing IP and System On Chip (SoC) solutions for data center applications. This role involves working within an agile team to ensure the verification closure of design modules, utilizing various methodologies including UVM, Formal, and Emulation to deliver high-quality designs.

Responsibilities:

  • Define and implement IP/SoC verification plans and build verification test benches.
  • Develop functional tests based on the verification test plan.
  • Drive Design Verification to closure based on defined metrics, including functional and code coverage.
  • Debug and resolve functional failures in collaboration with the Design team.
  • Collaborate with cross-functional teams to ensure high design quality.
  • Implement continuous improvements in Design Verification using the latest methodologies and tools.

Qualifications:

  • Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field.
  • 6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification.
  • 6+ years of experience in IP/sub-system and/or SoC level verification using SystemVerilog UVM/OVM methodologies.
  • Experience with EDA tools and scripting languages (Python, TCL, Perl, Shell) for building verification environments.

Skills:

  • Experience with revision control systems like Mercurial, Git, or SVN.
  • Verification experience with ARM/RISC-V based sub-systems or SoCs.
  • Knowledge in SV Assertions, Formal, and Emulation methodologies.
  • Experience in developing UVM based verification environments from scratch.
  • Ability to architect and implement Design Verification infrastructure.
  • Familiarity with high-speed interface verification (PCIe, RoCE, Ethernet, DDR, HBM).
  • Experience in micro-architectural performance verification and verifying GPU/CPU designs.
  • Knowledge of Design verification for data-center applications including Video, AI/ML, and Networking.

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