Hardware Emulation Engineer

Join Google's AI and Infrastructure team to shape the future of AI/ML hardware acceleration by driving cutting-edge TPU technology. This role focuses on developing custom silicon solutions and verifying complex digital designs, particularly in TPU architecture and its integration within AI/ML systems.

Responsibilities:

• Drive system bring-up on emulation platforms, debug test failures and simulation/emulation mismatches.
• Bring up external I/O interfaces (e.g., PCIe, Memories, SERDES, SPI, JTAG) on the emulation platforms.
• Develop and operate tests on the emulators and assist in bring-up processes from prototyping through post-silicon validation.
• Contribute to ongoing methodology and automation improvements, constantly evolving and improving emulation efficiency and value.
• Create and support emulation models from RTL and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.

Qualifications:

• Bachelor's degree in Electrical Engineering or a related field.
• 6 years of industry experience with RTL design (e.g., Verilog or System Verilog) and simulation (e.g., VCS, Incisive or Questa).
• Experience with coding or scripting in C, C++, Perl, TCL or Python.
• Experience with emulation systems (e.g., ZeBu, Palladium, Veloce), compilation, debugging, performance and methodology enhancements.

Skills:

• Master's degree in Electrical Engineering or a related field (preferred).
• 10 years of industry experience with RTL design and simulation (preferred).
• Experience with performance analysis/debug techniques (preferred).
• Knowledge of external I/O interfaces like PCIe, DDR5, HBM, SPI, or JTAG (preferred).
• Understanding of computer architecture including industry standard interfaces and memory subsystems (preferred).