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Senior Staff RTL Design Engineer

Published Date: January 23, 2026
Advanced Micro Devices, Inc, 2100 Logic Drive, San Jose, CA 95124
Job Description:

At AMD, we are dedicated to building innovative products that enhance next-generation computing experiences across various domains, including AI, data centers, PCs, and gaming. Our culture emphasizes collaboration, bold ideas, and a commitment to excellence, making us a leader in technological advancement. Join us to shape the future of AI and advance your career in a dynamic environment.

Responsibilities:

  • Drive end-to-end delivery of SerDes solutions, coordinating implementation and optimization across multiple teams.
  • Interface with software and hardware engineering teams and AMD partners to plan, develop, and optimize use cases.
  • Write microarchitecture and/or design specifications for SOC design.
  • Design, implement, and debug complex logic designs.
  • Integrate complex IPs into the SOC.
  • Collaborate with SOC Design teams including Verification, Emulation, STA, and Physical Design.
  • Support front-end integration activities such as Lint, CDC, Synthesis, and ECO.
  • Implement design automation using Python or other scripting languages.
  • Work with software and systems teams to ensure high-quality system integration.

Qualifications:

  • Bachelor’s or Master’s degree in a related discipline preferred.
  • Hands-on experience in all aspects of the chip development process.
  • Proficiency in front-end tools and methodologies.
  • Experience in writing specifications and converting them to design.
  • Knowledge of system architecture, CPU & IP integration, and power and clock management designs is desirable.

Skills:

  • Strong communication and collaboration skills.
  • Experience in front-end implementation tasks such as synthesis, timing, area/power analysis, linting, and logic equivalence checks.
  • Familiarity with low-power design techniques like clock- and power-gating.
  • Knowledge of scripting languages such as Perl, Python, or Tcl.
  • Familiarity with common on-chip bus protocols like AMBA (AXI, AHB, APB).
  • Understanding of security concepts and software/operating concepts.

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