Engineer, ASIC Analog Design

Micron Technology is a leader in memory and storage solutions, aiming to transform information into intelligence. The ASIC Analog Design team in Minneapolis focuses on developing next-generation tester ASICs and memory controller IP, collaborating across various teams to deliver high-performance products.

Responsibilities:

• Design and develop critical analog and mixed-signal PHY sub-blocks for deep sub-micron technology nodes.
• Own specifications, implementation, and integration of key blocks such as PLLs, DLLs, CDRs, receivers, transmitters, or high-speed datapaths.
• Drive and supervise complex analog layout activities, including IP floorplanning and coordination with mask designers.
• Plan and participate in silicon bring-up, characterization, and correlation of lab results to simulation data.
• Collaborate with Packaging, Board, and Validation teams to address signal integrity, power delivery, and system-level considerations.
• Present complex design concepts, tradeoffs, and results clearly to internal teams and external customers.

Qualifications:

• Bachelor’s, Master’s, or PhD in Electrical Engineering.
• Proven ASIC analog or mixed-signal design experience.
• Strong fundamentals in AMS design, advanced CMOS, and FinFET technologies.
• Experience designing high-speed memory or SerDes interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6, PCIe, USB, SATA, or similar).
• Deep understanding of analog and mixed-signal circuit behavior, architecture tradeoffs, and device physics.
• Strong written and verbal communication skills.

Skills:

• Experience taking full ownership of at least one major PHY or SerDes sub-block.
• Hands-on experience with lab testing, data analysis, and design of experiments for complex debug scenarios.
• Knowledge of mismatch analysis, Monte Carlo simulations, and transistor-level noise analysis.
• Familiarity with industry-standard tools such as Cadence ADE, Spectre, AMS verification, EM/IR flows, MATLAB, and Calibre.
• Understanding of signal integrity, power delivery, ESD, and system-level modeling (Verilog-A or Python).
• Demonstrated curiosity, collaborative approach, and continuous learning orientation.