Munich, Germany, and Oxford, UK – 28th January, 2025 — Codasip GmbH and RED Semiconductor International Ltd have signed a Memorandum of Understanding (MoU) to collaborate on developing advanced AI acceleration technologies.
Under the MoU, RED will leverage the Codasip Studio processor design tools to integrate its VISC technology as an accelerator for Codasip
The semiconductor industry is poised for a significant expansion in 2025, with plans to commence construction on 18 new fabrication plants (fabs). This surge, detailed in SEMI’s World Fab Forecast, reflects the industry’s projected growth to $697 billion in 2025, an 11.2% increase from 2024. While some fabs are slated
Read MoreMont-Saint-Guibert, Belgium, January 28, 2025 – intoPIX, a leading provider of innovative image compression technologies, and PlexusAV, a pioneer in IPMX solutions, are proud to announce the successful interoperability testing between the Plexus P-AVN-4 IPMX JPEG XS FIP transceiver and the new intoPIX Titanium Software Suite. This collaboration highlights the
Read MoreSUNNYVALE, Calif., Jan. 21, 2025 /PRNewswire/ — Blue Cheetah Analog Design today announced the successful tape-outs of its next generation BlueLynx™ die-to-die (D2D) PHY on Samsung Foundry’s SF4X 4nm advanced manufacturing process. The latest PHY supports both advanced and standard chiplet packaging with an aggregate throughput exceeding 100 Tbps while
Read MoreSAN JOSE, Calif.— January 21, 2025 — Cadence (Nasdaq: CDNS) today announced it has entered into a definitive agreement to acquire Secure-IC, a leading embedded security IP platform provider. The addition of Secure-IC’s talent and highly complementary, proven portfolio of embedded security IP, security solutions, security evaluation tools and services will
Read MoreMulti Chip Modules (MCM) have emerged as a game-changing solution. As consumer demand for faster, more powerful electronics increases, traditional chip designs can no longer meet the growing need for performance and space-saving designs. MCMs offer a sophisticated approach to semiconductor architecture by integrating multiple chips into a single package.
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