Blog

Focused Ion Beam (FIB)

fib

Integrated circuit (IC) designers are learning that a technique long used on older process nodes is providing even more valuable benefits as they develop devices to be manufactured at advanced technology nodes, including 28nm and beyond. During a period when it takes $10 million or more to bring a device

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Low Parasitic HBM ESD Testing

The Human Body Model (HBM) Electrostatic Discharge (ESD) test is the oldest and most widely used ESD test in the electronics industry. The JEDEC HBM test isn’t static; it has been revised to keep up with the rapid changes in the semiconductor industry. The latest revision of the spec addresses failures

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FortifyIQ Partners with Nexus-GT to Expand its Security Market Reach in Israel

press release

Dec. 09, 2025 –  The Startup-Nation is increasingly demanding highly efficient, customized classical and post-quantum cryptography. This partnership brings high-assurance system-tailored security to Israel; a “Crypto-Security Boutique.”
 
Jerusalem, Israel – December 9, 2025 – FortifyIQ, Inc., a provider of high-assurance hardware and software security solutions and services, announced today the signing

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Pushing the boundaries with sensing excellence: a deep dive with Jens Milnikel

This interview with Jens Milnikel, EVP & GM, CMOS Sensors ASICs (CSA) at ams OSRAM, reveals not just the technologies and strategies driving the CSA business of ams OSRAM, but the human stories, partnerships, and vision that set it apart as a true leader in the future of sensing solutions.
 

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A Brief History of SkyWater Technology

wafer

To understand SkyWater’s origins, one must first rewind to the convergence of national security and semiconductor manufacturing. For decades, the U.S. military and intelligence agencies relied on advanced microelectronics built on American soil. Semiconductors powered guidance systems, radars and signal processors from the Cold War era onward.
 
At the

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Maximizing SoC Longevity with PCIe 3.0: A Designer’s Guide

Direction Uncertainty

As PCIe 5.0 and 6.0 dominate headlines in the semiconductor industry, it’s tempting for every SoC design team to reach for the newest protocol available. But not every application needs blazing-fast 32GT/s throughput—and not every market segment can afford the power, complexity, and cost penalties that come with bleeding-edge PHYs.
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