Semiconductor foundries claim they release a new technology node every two years. They may be off by a year or two, but on the whole, this is quite impressive, no doubt. Come to think of it, I don’t believe many of us even change our mobile phone every two years. How
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With the increased complexity of SoC designs, high tapeout prices and shrinking time-to-market, ASIC Prototyping has become a key step in ASIC projects. FPGA development boards are being used more often to verify ASIC design, test hardware and software integration, and provide a proof of concept demonstration to potential customers
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The following infographics shows Synopsys’s mergers and acquisitions along the years from its very beginning. Synopsys was founded in 1986 by David Gregory, Aart de Geus and has been involved with many mergers and acquisitions.
The very recent large acquisitions include:
2008
Synplicity
ChipIT
2009
ChipIdea
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What is a die per wafer calculator?
A die per wafer calculator is a tool used by chip designers and fabs to estimate how many individual dies (aka chips) can be cut from a single semiconductor wafer.
It’s like trying to fit as many square stickers as possible on
The following infographics shows Cadence’s mergers and acquisitions along the years from its very beginning.
Cadence Design Systems was founded in 1988 by the merger of SDA Systems and ECAD and has been involved with 100 mergers and acquisitions. The very recent and large acquisitions are:
Year 2013
Tensilica
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In 2005 I applied for a job in Singapore. The job required some technical and business skills and therefore the interview was a bit tricky.
One part of the interview related to estimating market size. They asked me to estimate the number of Piano Tuning companies which are currently active