Woodcliff Lake, New Jersey — June 5, 2025 — Semiconductor intellectual property core provider CAST has added new products to its already-strong line of Functional Safety certified design IP cores.
The Functional Safety (FuSa) standard governing automotive systems, ISO 26262, defines Automotive Safety Integrity Levels based on the severity,
Shanghai, China — May 27, 2025 — Brite Semiconductor (Shanghai) Co., Ltd. (BriteSemi, 688691), a leading provider of custom ASIC and IP solutions, today announced the launch of Ternary Content-Addressable Memory (TCAM) IP developed on 28HKC+ 0.9V/1.8V platform. This IP has the features of high frequency and low power consumption. With the
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LONDON & BASINGSTOKE — 23 May 2025 — Analogue Insight Ltd. and Tetrivis Ltd. today unveiled a strategic collaboration to co-develop Eurytion RFK1, a 12 nm RF chiplet transceiver that delivers wide-band Ka/Ku operation with an integrated local oscillator and up to 2 GHz of instantaneous, fully-programmable bandwidth. Leveraging Tetrivis’
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Kaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports next-generation optical and high-speed communication systems and is now available in both
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Sheffield, UK – 20 May 2025. SureCore, the leading memory specialist, has announced the expansion of its sureFIT design service to include AI applications, using its memory design expertise to help AI chip developers achieve their complex power and performance goals.
Paul Wells, CEO at sureCore, explains:
HOD HASHARON, Israel and SEOUL, South Korea – May 1, 2025 – Weebit Nano Limited (ASX:WBT) (Weebit), a leading developer and licensor of advanced memory technologies for the global semiconductor industry, and tier-1 semiconductor foundry DB HiTek will show the first demonstration of DB HiTek’s Bipolar-CMOS-DMOS (BCD) silicon integrating Weebit’s
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